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Datasheet Microsemi M2S005-FG484

Manufacturer:Microsemi
Family:SmartFusion2
Series:M2S005
Part Number:M2S005-FG484

SoC FPGA

Datasheets

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    Military Grade IGLOO2 FPGA and SmartFusion2 SoC FPGA
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    Military Grade IGLOO2 FPGA and SmartFusion2 SoC FPGA
    Datasheet Military Grade IGLOO2 FPGA and SmartFusion2 SoC FPGA Datasheet Table of Contents
    1. Introduction . 9 2. Device Status . 9 3. Product Briefs and Pin Descriptions . 10 4. General Specifications . 10
    4.1. Operating Conditions 10 4.2. Overshoot/Undershoot Limits 13 4.3. Thermal Characteristics 13
    Introduction Theta-JA Theta-JB Theta-JC 13 14 15 15 5. Power Consumption . 15
    5.1. Quiescent Supply Current . 15 5.2. Programming Currents . 16 6. Average Fabric Temperature and Voltage Derating Factors 17 7. Timing Model . 18 8. User I/O Characteristics 20
    8.1. Input Buffer and AC Loading 8.2. Output Buffer and AC Loading 8.3. Tristate Buffer and AC Loading 8.4. I/O Speeds 8.5. Detailed I/O Characteristics . 8.6. Single-Ended I/O Standards . 20 21 22 22 24 24 Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS) 24 3.3 V LVCMOS/LVTTL . 24 2.5 V LVCMOS . 26 1.8 V LVCMOS . 29 1.5 V LVCMOS . 33 1.2 V LVCMOS . 36 3.3 V PCI/PCIX . 38 8.7. Memory Interface and Voltage Referenced I/O Standards . 39
    High-Speed Transceiver Logic (HSTL) . Stub-Series Terminated Logic Stub-Series Terminated Logic 2.5 V (SSTL2) Stub-Series Terminated Logic 1.8 V (SSTL18) . Stub-Series Terminated Logic 1.5 V (SSTL15) . Low Power Double Data Rate (LPDDR) LVDS . B-LVDS . M-LVDS . Mini-LVDS . RSDS LVPECL 39 41 41 44 46 49 54 56 57 59 60 62 8.8. Differential I/O Standards . 54 8.9. I/O Register Specifications 63 Revision 1 2 Military Grade IGLOO2 FPGA and SmartFusion2 SoC FPGA Datasheet Input Register 63 Output/Enable Register . 65 8.10. DDR Module Specification . 67
    Input DDR Module . Input DDR Timing Diagram Timing Characteristics Output DDR Module Timing Characteristics 67 68 69 70 72 9. Logic Element Specifications 73
    9.1. 4-input LUT (LUT-4) . 73 9.2. Sequential Module 74
    Timing Characteristics 75 10. Global Resource Characteristics 75 11. FPGA Fabric SRAM 76
    11.1. FPGA Fabric Large SRAM (LSRAM) . 76 11.2. FPGA Fabric Micro SRAM (uSRAM) 83 12. Crystal Oscillator . 93 13. On-Chip Oscillator 94 14. Clock Conditioning Circuits (CCC) 95 15. JTAG . 96 16. System Controller SPI Characteristics 97 17. Mathblock Timing Characteristics 98 18. Flash*Freeze Timing Characteristics 100 19. PCIe Electrical and Timing AC and DC Characteristics 100 20. SmartFusion2 Specifications 102
    20.1. MSS Clock Frequency . 102 20.2. SmartFusion2 Inter-Integrated Circuit (I2C) Characteristics . 102 20.3. Serial Peripheral Interface (SPI) Characteristics . 104 21. IGLOO2 Specifications . 107
    21.1. HPMS Clock Frequency 107 21.2. IGLOO2 Serial Peripheral I ...

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Manufacturer's Classification

  • SoC FPGAs

Other Names: M2S005FG484, M2S005 FG484

Docket:
IGLOO2 FPGA and SmartFusion2 SoC FPGA
Datasheet IGLOO2 FPGA and SmartFusion2 SoC FPGA Table of Contents
1. Introduction . 9 2. Device Status . 9 3. Product Briefs and Pin Descriptions . 10 4. General Specifications . 10
4.1. Operating Conditions 10 4.2. Overshoot/Undershoot Limits 13 4.3. Thermal Characteristics 13
Introduction Theta-JA Theta-JB Theta-JC 13 14 15 15 5. Power Consumption . 15
5.1. Quiescent Supply Current 15 5.2. Programming Currents . 17 6. Average Fabric Temperature and Voltage Derating Factors 18 7. Timing Model 19 8. User I/O Characteristics 21
8.1. Input Buffer and AC Loading 8.2. Output Buffer and AC Loading 8.3. Tristate Buffer and AC Loading 8.4. I/O Speeds . 8.5. Detailed I/O Characteristics . 8.6. Single-Ended I/O Standards . 21 22 23 23 25 26 Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS) 26 3.3 V LVCMOS/LVTTL . 26 2.5 V LVCMOS . 28 1.8 V LVCMOS . 31 1.5 V LVCMOS . 35 1.2 V LVCMOS . 38 3.3 V PCI/PCIX . 41 8.7. Memory Interface and Voltage Referenced I/O Standards . 42
High-Speed Transceiver Logic (HSTL) . Stub-Series Terminated Logic Stub-Series Terminated Logic 2.5 V (SSTL2) Stub-Series Terminated Logic 1.8 V (SSTL18) . Stub-Series Terminated Logic 1.5 V (SSTL15) . Low Power Double Data Rate (LPDDR) LVDS . B-LVDS . M-LVDS . Mini-LVDS . RSDS LVPECL 42 44 44 47 50 53 58 60 62 63 65 67 8.8. Differential I/O Standards . 58 Revision 4 2 IGLOO2 FPGA and SmartFusion2 So...

  • Series: M2S005 (1)
    • M2S005-FG484
  • All series of family SmartFusion2:
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