Datasheet Texas Instruments ADS822

ManufacturerTexas Instruments
SeriesADS822
Datasheet Texas Instruments ADS822

10-Bit, 40-MSPS Analog-to-Digital Converter (ADC)

Datasheets

ADS822, ADS825: 10-Bit, 40MHz Sampling Analog-To-Digital Converter datasheet
PDF, 872 Kb, Revision: B, File published: Jul 18, 2002
Extract from the document
Datasheet

Prices

Status

ADS822EADS822E/1KADS822E/1KG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNo

Packaging

ADS822EADS822E/1KADS822E/1KG4
N123
Pin282828
Package TypeDBDBDB
Industry STD TermSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY5010001000
CarrierTUBELARGE T&RLARGE T&R
Device MarkingADS822EADS822EADS822E
Width (mm)5.35.35.3
Length (mm)10.210.210.2
Thickness (mm)1.951.951.95
Pitch (mm).65.65.65
Max Height (mm)222
Mechanical DataDownloadDownloadDownload

Parametrics

Parameters / ModelsADS822E
ADS822E
ADS822E/1K
ADS822E/1K
ADS822E/1KG4
ADS822E/1KG4
# Input Channels111
Analog Input BW, MHz300300
Analog Input BW(MHz)300
Approx. Price (US$)6.30 | 1ku
ArchitecturePipelinePipelinePipeline
DNL(Max), +/-LSB11
DNL(Max)(+/-LSB)1
DNL(Typ), +/-LSB0.250.25
ENOB, Bits9.59.5
ENOB(Bits)9.5
INL(Max), +/-LSB22
INL(Max)(+/-LSB)2
INL(Typ), +/-LSB0.50.5
Input BufferNoNo
Input Range1,21,21V / 2V (p-p)
InterfaceParallel CMOSParallel CMOSParallel CMOS
Operating Temperature Range, C-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Package GroupSSOPSSOPSSOP
Package Size(mm2=WxL)28SSOP: 80 mm2: 7.8 x 10.2
Package Size: mm2:W x L, PKG28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)
Power Consumption(Typ), mW200200
Power Consumption(Typ)(mW)200
RatingCatalogCatalogCatalog
Reference ModeExt,IntExt,IntInt
Ext
Resolution, Bits1010
Resolution(Bits)10
SFDR, dB6666
SFDR(dB)66
SINAD, dB5959
SINAD(dB)59
SNR, dB6060
SNR(dB)60
Sample Rate (max)(SPS)40MSPS
Sample Rate(Max), MSPS4040

Eco Plan

ADS822EADS822E/1KADS822E/1KG4
RoHSCompliantCompliantCompliant
Pb FreeYes

Application Notes

  • ADS82x ADC with non-uniform sampling clock
    PDF, 234 Kb, File published: Feb 28, 2005
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, File published: Sep 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, File published: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, File published: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, File published: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, File published: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, File published: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, File published: Apr 16, 2015

Model Line

Series: ADS822 (3)

Manufacturer's Classification

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)
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