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Datasheet Microchip PIC18F67K40

Manufacturer:Microchip
Series:PIC18F67K40

PIC18(L)F67K40 microcontrollers combine large Flash/EE/RAM memory, rich peripheral integration, XLP and 5V support to suit a variety of general purpose applications

Datasheets

  • Download » Datasheet, PDF, 4.9 Mb, Revision: 04-18-2017
    PIC18(L)F67K40 64-Pin, Low-Power High-Performance MCU with XLP
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    PIC18(L)F67K40
    64-Pin, Low-Power, High-Performance Microcontrollers
    with XLP Technology
    Description
    PIC18(L)F67K40 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals,
    combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications.
    These 64-pin devices are equipped with a 10-bit ADC with Computation (ADCC) automating Capacitive Voltage Divider
    (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold
    comparisons. They also offer a set of Core Independent Peripherals such as Complementary Waveform Generator
    (CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect
    (ZCD) and Peripheral Pin Select (PPS), providing for increased design flexibility and lower system cost. Core Features Power-Saving Operation Modes C Compiler Optimized RISC Architecture Operating Speed:
    -DC – 64 MHz clock input
    -62.5 ns minimum instruction cycle Programmable 2-Level Interrupt Priority 31-Level Deep Hardware Stack Four 8-Bit Timers (TMR2/4/6/8) with Hardware
    Limit Timer (HLT) Five 16-Bit Timers (TMR0/1/3/5/7) Low-Current Power-on Reset (POR) Power-up Timer (PWRT) Brown-out Reset (BOR) Low-Power BOR (LPBOR) Option Programmable Code Protection Windowed Watchdog Timer (WWDT):
    -Timer monitoring of overflow and underflow
    events
    -Variable prescaler selection
    -Variable window size selection
    -All sources configurable in hardware or
    software Doze: CPU and Peripherals Running at Different
    Cycle Rates (typically CPU is lower) Idle: CPU Halted While Peripherals Operate Sleep: Lowest Power Consumption Peripheral Module Disable (PMD):
    -Ability to selectively disable hardware module
    to minimize active power consumption of ...

Prices

Status

 PIC18F67K40-E/MRPIC18F67K40-E/PTPIC18F67K40-I/MRPIC18F67K40-I/PTPIC18F67K40T-I/MRPIC18F67K40T-I/PTPIC18LF67K40-E/MRPIC18LF67K40-E/PTPIC18LF67K40-I/MRPIC18LF67K40-I/PTPIC18LF67K40T-I/MRPIC18LF67K40T-I/PT
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)

Packaging

Parametrics

 PIC18F67K40-E/MRPIC18F67K40-E/PTPIC18F67K40-I/MRPIC18F67K40-I/PTPIC18F67K40T-I/MRPIC18F67K40T-I/PTPIC18LF67K40-E/MRPIC18LF67K40-E/PTPIC18LF67K40-I/MRPIC18LF67K40-I/PTPIC18LF67K40T-I/MRPIC18LF67K40T-I/PT
# of Comparators333333333333
ADCC with ComputationYesYesYesYesYesYesYesYesYesYesYesYes
Angular TimerNoNoNoNoNoNoNoNoNoNoNoNo
Architecture888888888888
CPU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU8-bit PIC MCU
CRC/ScanYesYesYesYesYesYesYesYesYesYesYesYes
Complementary Waveform Generator, CWG) / Complementary Output Gene111111111111
Data Signal Modulator, DSM111111111111
EEPROM / HEF102410241024102410241024102410241024102410241024
Hardware Limit Timer111111111111
Hardware Touch PeripheralADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVDADC2 with HCVD
High Voltage CapableNoNoNoNoNoNoNoNoNoNoNoNo
I2C222222222222
Internal Oscillator64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz64MHZ, 64KHz
Internal Voltage Reference, BandgapYesYesYesYesYesYesYesYesYesYesYesYes
Math AcceleratorNoNoNoNoNoNoNoNoNoNoNoNo
Max # PWM outputs, including complementary outputs555555555555
Max 16 Bit Digital Timers444444444444
Max 8 Bit Digital Timers555555555555
Max A/D Resolution, bits101010101010101010101010
Max D/A Resolution, bits555555555555
Max PWM Resolution, bits101010101010101010101010
Max. CPU Speed MHz646464646464646464646464
Number of D/A Converters111111111111
Operating Temperature Range, °C-40 to +125-40 to +125-40 to +85-40 to +85-40 to +85-40 to +85-40 to +125-40 to +125-40 to +85-40 to +85-40 to +85-40 to +85
Operation Voltage Max.(V)5.55.55.55.55.55.55.55.55.55.55.55.5
Operation Voltage Min.(V)1.81.81.81.81.81.81.81.81.81.81.81.8
Peripheral Pin Select, PPSYesYesYesYesYesYesYesYesYesYesYesYes
Pin count646464646464646464646464
Program Memory Size, Kbytes128128128128128128128128128128128128
RAM, bytes356235623562356235623562356235623562356235623562
SPIв„ў222222222222
Signal Measurement Timer222222222222
Temp. Range Max.125125125125125125125125125125125125
Temp. Range Min.-40-40-40-40-40-40-40-40-40-40-40-40
Total # of A/D channels474747474747474747474747
UART555555555555
Windowed Watchdog Timer, WWDTYesYesYesYesYesYesYesYesYesYesYesYes
Zero Cross detectYesYesYesYesYesYesYesYesYesYesYesYes

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