10022012 Simple sawtooth generator operates at high frequencyLuca Bruno, Italy Pulsewidthmodulation signalgenerator circuits often use an analog sawtoothoscillator function, but it also can be useful in other applications. The inexpensive sawtooth generator in Figure 1 suits use in lowpower applications operating at frequencies as high as 10 MHz and beyond and those in which ramp linearity and frequency accuracy are not prominent concerns.
The circuit employs a single Schmitttrigger inverter, which acts as a modified astable multivibrator. The output waveform is the voltage across timing capacitor C_{T}, which ramps between the lower and the upper threshold voltages of the inverter. Charging the R_{T}C_{T} network at constant voltage causes the ramp, so its response is exponential, approximately linear only for the initial part of the exponential rise. A simple trick to improve ramp linearity is to charge the R_{T}C_{T} network with a highervoltage source. Capacitor C_{1}, which has a value that is at least 10 times greater than that of C_{T}, acts as a charge pump. When the gate output is low during the falling edge of the sawtooth, capacitor C_{1} quickly charges through diode D_{1} to V_{CC} minus the forward voltage of D_{1}. Meanwhile, capacitor C_{T} discharges quickly through diode D_{2}. When the falling C_{T} voltage reaches the Schmitt trigger’s lower trip point, V_{T}^{−}, the gate output returns high. The charge on C_{1} drives the cathode of D_{1} to the sum of the voltage of capacitor C_{1} and the gate’s high output voltage. D_{1} becomes reversebiased, and the R_{T}C_{T} network begins to charge to the voltage on C_{1}, along with the gate’s high output voltage. When C_{T} reaches the Schmitt trigger’s upper trip point, V_{T}^{+}, the gate’s output returns low, and the cycle repeats. Ramp linearity is proportional to the sum of the V_{CC} and V_{DD} supply voltages. Because V_{DD} is fixed at 5V, you can improve ramp linearity if V_{CC} can assume a value higher than that of the inverter. You can estimate the ramp’s nonlinearity error using the following equation: where E_{NL}% is the percentage of nonlinearity error, M_{I} is the initial slope of the ramp, and M_{F} is the final slope of the ramp, and where V_{F} is the forwardvoltage drop across D_{1}. The R_{T}C_{T} time constant sets the frequency, F_{O}, of the sawtooth signal. You can estimate the frequency by applying a simple model to the circuit, which neglects the discharge time of C_{T} and any discharge of C_{T}, yielding the following equation: where K is a constant, which the following equation defines: By simulating the circuit with C_{T}=100 pF and R_{T}=2.2 kΩ, which agree with the values that the equations theoretically calculated, you can obtain rampnonlinearity errors of 28% with both V_{CC} and V_{DD} equal to 5V, 18% with V_{CC} of 10V and V_{DD} of 5V, and 14% with V_{CC} of 15V and V_{DD} of 5V. The breadboarded circuit has V_{DD}=V_{CC}=5V, C_{T}=100 pF, and R_{T}=2.2 kΩ. IC1 is a standard dualinline, eightpin 74HC14, which has a maximum propagation delay of 15 nsec versus 4.4 nsec for the SN74LVC1G14 inverter with a V_{DD} of 5V. The frequency is approximately 12.7 MHz. C_{T} should be a lowleakage film capacitor, and its value should be kept low to reduce its charging and discharging of a large amount of energy. Select C_{T} with a large enough value compared with the gate’s input capacitance and unwanted stray capacitances so that they do not introduce a significant error. Select R_{T} with a small enough value that the load impedance, gate input, and stray capacitances do not introduce significant error. You can use any CMOS Schmitttrigger inverter to test the circuit. To improve frequency accuracy, however, you should use a fast logic family with low propagation delay and high output current, such as the singlegate SN74LVC1G14 from Texas Instruments. You should measure the threshold trigger voltages, especially V_{T}^{−}, directly from the circuit under test before using the preceding equations. Quickly discharging C_{T} to ground through a finitepropagationdelay inverter causes the lower limit of the ramp to reset below the lower threshold, V_{T}^{−}. You can compensate for the resulting error if you use the measured value of V_{T}^{−}, which takes this effect into account.
News on theme: 
