Datasheet Texas Instruments ADS7229IRSATG4

ManufacturerTexas Instruments
SeriesADS7229
Part NumberADS7229IRSATG4
Datasheet Texas Instruments ADS7229IRSATG4

Low-Power, 12-Bit, 1-MHz, Single/Dual Unipolar Input, ADCs with Serial Interface 16-QFN -40 to 85

Datasheets

LOW-POWER, 12-BIT, 1MHz, SINGLE/DUAL UNIPOLAR INPUT, ADC w/SERIAL INTERFACE datasheet
PDF, 1.5 Mb, Revision: A, File published: Jun 18, 2009
Extract from the document

Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

Pin1616
Package TypeRSARSA
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device MarkingADS7229I A
Width (mm)44
Length (mm)44
Thickness (mm).9.9
Pitch (mm).65.65
Max Height (mm)11
Mechanical DataDownloadDownload

Parametrics

# Input Channels1
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)1.65 V
INL(Max)0.5 +/-LSB
Input Range(Max)5.5 V
Input TypePseudo-Differential,Single-Ended
Integrated FeaturesDaisy-Chainable,Oscillator
InterfaceSerial
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupQFN
Package Size: mm2:W x L16QFN: 16 mm2: 4 x 4(QFN) PKG
Power Consumption(Typ)13.7 mW
RatingCatalog
Reference ModeExt
Resolution12 Bits
SINAD73.7 dB
SNR73.9 dB
Sample Rate (max)1MSPS SPS
Sample Rate(Max)1 MSPS
THD(Typ)-88.5 dB

Eco Plan

RoHSCompliant

Application Notes

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, File published: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, File published: Apr 16, 2015

Model Line

Manufacturer's Classification

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)