Datasheet Texas Instruments CD4011UBMT
| Manufacturer | Texas Instruments |
| Series | CD4011UB |
| Part Number | CD4011UBMT |
CMOS Quad 2-Input NAND Gate 14-SOIC -55 to 125
Datasheets
CD4011UB TYPES datasheet
PDF, 1.0 Mb, Revision: D, File published: Aug 21, 2003
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 14 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 250 |
| Carrier | SMALL T&R |
| Device Marking | CD4011UBM |
| Width (mm) | 3.91 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Bits | 4 |
| F @ Nom Voltage(Max) | 8 Mhz |
| ICC @ Nom Voltage(Max) | 0.015 mA |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 1.5/-1.5 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | CD4000 |
| VCC(Max) | 18 V |
| VCC(Min) | 3 V |
| Voltage(Nom) | 10 V |
| tpd @ Nom Voltage(Max) | 50 ns |
Eco Plan
| RoHS | Compliant |
Application Notes
- Understanding Buffered and Unbuffered CD4xxxB Series Device CharacteristicsPDF, 188 Kb, File published: Dec 3, 2001
Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
Model Line
Series: CD4011UB (10)
Manufacturer's Classification
- Semiconductors > Logic > Gate > NAND Gate
