Datasheet Texas Instruments 74ACT11825DWR
| Manufacturer | Texas Instruments |
| Series | 74ACT11825 |
| Part Number | 74ACT11825DWR |
8-Bit Bus Interface Flip-Flops with 3-State Outputs 28-SOIC -40 to 85
Datasheets
8-Bit Bus-Interface Flip-Flop With 3-State Outputs (Rev. A)
PDF, 101 Kb, Revision: A, File published: Apr 1, 1993
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 28 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 7.5 |
| Length (mm) | 17.9 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | Download |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Application Notes
- Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati - Implications of Slow or Floating CMOS Inputs (Rev. D)PDF, 260 Kb, Revision: D, File published: Jun 23, 2016
- TI IBIS File Creation Validation and Distribution ProcessesPDF, 380 Kb, File published: Aug 29, 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con - CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - Designing With Logic (Rev. C)PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Model Line
Series: 74ACT11825 (3)
- 74ACT11825DW 74ACT11825DWR 74ACT11825NT
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop
