Datasheet Texas Instruments TLC2552IDGK
Manufacturer | Texas Instruments |
Series | TLC2552 |
Part Number | TLC2552IDGK |
12-Bit, 400 kSPS ADC, Serial Out, TMS320 Compatible (up to 10MHz), Dual Ch. Auto Sweep 8-VSSOP -40 to 85
Datasheets
5 V, Low-Power, 12-Bit, 175/360 KSPS, Serial ADC with AutoPower Down datasheet
PDF, 1.1 Mb, Revision: D, File published: Oct 17, 2002
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Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 8 |
Package Type | DGK |
Industry STD Term | VSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 80 |
Carrier | TUBE |
Device Marking | AHI |
Width (mm) | 3 |
Length (mm) | 3 |
Thickness (mm) | .97 |
Pitch (mm) | .65 |
Max Height (mm) | 1.07 |
Mechanical Data | Download |
Parametrics
# Input Channels | 2 |
Analog Voltage AVDD(Max) | 5.5 V |
Analog Voltage AVDD(Min) | 4.5 V |
Architecture | SAR |
Digital Supply(Max) | 5.5 V |
Digital Supply(Min) | 4.5 V |
INL(Max) | 1 +/-LSB |
Input Range(Max) | 5.5 V |
Input Type | Single-Ended |
Integrated Features | N/A |
Interface | SPI |
Multi-Channel Configuration | Multiplexed |
Operating Temperature Range | -40 to 85,0 to 70 C |
Package Group | VSSOP |
Package Size: mm2:W x L | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG |
Power Consumption(Typ) | 15 mW |
Rating | Catalog |
Reference Mode | Ext |
Resolution | 12 Bits |
SINAD | 72 dB |
SNR | 72 dB |
Sample Rate (max) | 400kSPS SPS |
Sample Rate(Max) | 0.4 MSPS |
THD(Typ) | -84 dB |
Eco Plan
RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: 5-6KINTERFACE
5-6K Interface Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Interfacing the TLC2552 and TLV2542 to the MSP430F149PDF, 123 Kb, File published: Feb 10, 2003
This application note discusses the features of the TLC2552 and TLV2542 ADC. An SPI interface code example for the MSP430F149 to the TLC2552 ADC, and for the MSP430F149 to the TLV2542 ADC, are also presented. - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: TLC2552 (6)
- TLC2552CDGK TLC2552CDGKG4 TLC2552ID TLC2552IDG4 TLC2552IDGK TLC2552IDGKG4
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)