Datasheet Texas Instruments 74AC11257

ManufacturerTexas Instruments
Series74AC11257
Datasheet Texas Instruments 74AC11257

Quadruple 2-Line To 1-Line Data Selectors/Multiplexers With 3-State Outputs

Datasheets

74AC11257 datasheet
PDF, 1.1 Mb, Revision: C, File published: May 21, 2004
Extract from the document

Prices

Status

74AC11257DW74AC11257DWR74AC11257N74AC11257PW74AC11257PWE474AC11257PWG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoYesNoNoNo

Packaging

74AC11257DW74AC11257DWR74AC11257N74AC11257PW74AC11257PWE474AC11257PWG4
N123456
Pin202020202020
Package TypeDWDWNPWPWPW
Industry STD TermSOICSOICPDIPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY25200020707070
CarrierTUBELARGE T&RTUBETUBETUBETUBE
Device MarkingAC11257AC1125774AC11257NAE257AE257AE257
Width (mm)7.57.56.354.44.44.4
Length (mm)12.812.824.336.56.56.5
Thickness (mm)2.352.354.57111
Pitch (mm)1.271.272.54.65.65.65
Max Height (mm)2.652.655.081.21.21.2
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / Models74AC11257DW
74AC11257DW
74AC11257DWR
74AC11257DWR
74AC11257N
74AC11257N
74AC11257PW
74AC11257PW
74AC11257PWE4
74AC11257PWE4
74AC11257PWG4
74AC11257PWG4
Bandwidth, MHz100100100100100100
Bits222222
Number of Channels444444
Configuration2:12:12:12:12:12:1
Digital input leakage(Max), uA555555
ESD Charged Device Model, kV0.750.750.750.750.750.75
ESD HBM, kV222222
F @ Nom Voltage(Max), Mhz100100100100100100
FunctionEncoder/MultiplexerEncoder/MultiplexerEncoder/MultiplexerEncoder/MultiplexerEncoder/MultiplexerEncoder/Multiplexer
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.08
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-24
Package GroupSOICSOICPDIPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)See datasheet (PDIP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNo
Technology FamilyACACACACACAC
Type3-State Output3-State Output3-State Output3-State Output3-State Output3-State Output
VCC(Max), V5.55.55.55.55.55.5
VCC(Min), V333333
Voltage(Nom), V3.3,53.3,53.3,53.3,53.3,53.3,5
tpd @ Nom Voltage(Max), ns9,6.59,6.59,6.59,6.59,6.59,6.5

Eco Plan

74AC11257DW74AC11257DWR74AC11257N74AC11257PW74AC11257PWE474AC11257PWG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYes

Application Notes

  • Live Insertion
    PDF, 150 Kb, File published: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Introduction to Logic
    PDF, 93 Kb, File published: Apr 30, 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, Revision: D, File published: Jun 23, 2016
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, File published: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, File published: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, File published: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors> Switches and Multiplexers> Buffered Encoders and Decoders
EMS supplier