Datasheet Texas Instruments CD54AC74F3A
| Manufacturer | Texas Instruments |
| Series | CD54AC74 |
| Part Number | CD54AC74F3A |
Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-CDIP -55 to 125
Datasheets
CD54AC74, CD74AC74 datasheet
PDF, 786 Kb, Revision: D, File published: Dec 5, 2002
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 14 |
| Package Type | J |
| Industry STD Term | CDIP |
| JEDEC Code | R-GDIP-T |
| Package QTY | 1 |
| Carrier | TUBE |
| Device Marking | CD54AC74F3A |
| Width (mm) | 6.67 |
| Length (mm) | 19.56 |
| Thickness (mm) | 4.57 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Download |
Parametrics
| 3-State Output | No |
| Bits | 2 |
| F @ Nom Voltage(Max) | 100 Mhz |
| ICC @ Nom Voltage(Max) | 0.04 mA |
| Input Type | CMOS |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 24/-24 mA |
| Output Type | CMOS |
| Package Group | CDIP |
| Package Size: mm2:W x L | See datasheet (CDIP) PKG |
| Rating | Military |
| Technology Family | AC |
| VCC(Max) | 5.5 V |
| VCC(Min) | 1.5 V |
| tpd @ Nom Voltage(Max) | 114,12.7,9.1 ns |
Eco Plan
| RoHS | See ti.com |
Application Notes
- CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - Input and Output Characteristics of Digital Integrated CircuitsPDF, 1.7 Mb, File published: Oct 1, 1996
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
- Designing With Logic (Rev. C)PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Model Line
Series: CD54AC74 (1)
- CD54AC74F3A
Manufacturer's Classification
- Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers
