Datasheet Texas Instruments CD74ACT20

ManufacturerTexas Instruments
SeriesCD74ACT20
Datasheet Texas Instruments CD74ACT20

Dual 4-Input NAND Gates

Datasheets

CD54ACT20, CD74ACT20 datasheet
PDF, 970 Kb, File published: Nov 15, 2002
Extract from the document

Prices

Status

CD74ACT20ECD74ACT20EE4CD74ACT20MCD74ACT20M96CD74ACT20MG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNo

Packaging

CD74ACT20ECD74ACT20EE4CD74ACT20MCD74ACT20M96CD74ACT20MG4
N12345
Pin1414141414
Package TypeNNDDD
Industry STD TermPDIPPDIPSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY252550250050
CarrierTUBETUBETUBELARGE T&RTUBE
Device MarkingCD74ACT20ECD74ACT20EACT20MACT20MACT20M
Width (mm)6.356.353.913.913.91
Length (mm)19.319.38.658.658.65
Thickness (mm)3.93.91.581.581.58
Pitch (mm)2.542.541.271.271.27
Max Height (mm)5.085.081.751.751.75
Mechanical DataDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCD74ACT20E
CD74ACT20E
CD74ACT20EE4
CD74ACT20EE4
CD74ACT20M
CD74ACT20M
CD74ACT20M96
CD74ACT20M96
CD74ACT20MG4
CD74ACT20MG4
Bits22222
F @ Nom Voltage(Max), Mhz9090909090
ICC @ Nom Voltage(Max), mA0.040.040.040.040.04
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-24
Package GroupPDIPPDIPSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Technology FamilyACTACTACTACTACT
VCC(Max), V5.55.55.55.55.5
VCC(Min), V4.54.54.54.54.5
Voltage(Nom), V55555
tpd @ Nom Voltage(Max), ns12.312.312.312.312.3

Eco Plan

CD74ACT20ECD74ACT20EE4CD74ACT20MCD74ACT20M96CD74ACT20MG4
RoHSCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

Application Notes

  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Gate> NAND Gate
EMS supplier