Datasheet Texas Instruments CD74HC42
| Manufacturer | Texas Instruments |
| Series | CD74HC42 |
High Speed CMOS Logic 1-of-10 BCD to Decimal Decoder
Datasheets
CD54HC42, CD74HC42, CD74HCT42 datasheet
PDF, 271 Kb, Revision: C, File published: May 21, 2003
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Status
| CD74HC42E | CD74HC42M | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No |
Packaging
| CD74HC42E | CD74HC42M | |
|---|---|---|
| N | 1 | 2 |
| Pin | 16 | 16 |
| Package Type | N | D |
| Industry STD Term | PDIP | SOIC |
| JEDEC Code | R-PDIP-T | R-PDSO-G |
| Package QTY | 25 | 40 |
| Carrier | TUBE | TUBE |
| Device Marking | CD74HC42E | HC42M |
| Width (mm) | 6.35 | 3.91 |
| Length (mm) | 19.3 | 9.9 |
| Thickness (mm) | 3.9 | 1.58 |
| Pitch (mm) | 2.54 | 1.27 |
| Max Height (mm) | 5.08 | 1.75 |
| Mechanical Data | Download | Download |
Parametrics
| Parameters / Models | CD74HC42E | CD74HC42M |
|---|---|---|
| Bandwidth, MHz | 28 | 28 |
| Bits | 10 | 10 |
| Number of Channels | 1 | 1 |
| Configuration | 4:10 | 4:10 |
| Digital input leakage(Max), uA | 5 | 5 |
| ESD Charged Device Model, kV | 0.75 | 0.75 |
| ESD HBM, kV | 2 | 2 |
| F @ Nom Voltage(Max), Mhz | 28 | 28 |
| Function | Decoder/Demultiplexer | Decoder/Demultiplexer |
| ICC @ Nom Voltage(Max), mA | 0.08 | 0.08 |
| Operating Temperature Range, C | -55 to 125 | -55 to 125 |
| Output Drive (IOL/IOH)(Max), mA | 5.2/-5.2 | 5.2/-5.2 |
| Package Group | PDIP | SOIC |
| Package Size: mm2:W x L, PKG | See datasheet (PDIP) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) |
| Rating | Catalog | Catalog |
| Schmitt Trigger | No | No |
| Technology Family | HC | HC |
| Type | Standard | Standard |
| VCC(Max), V | 6 | 6 |
| VCC(Min), V | 2 | 2 |
| Voltage(Nom), V | 3.3,5 | 3.3,5 |
| tpd @ Nom Voltage(Max), ns | 30 | 30 |
Eco Plan
Application Notes
- SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, File published: May 1, 1996
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
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Manufacturer's Classification
- Semiconductors> Switches and Multiplexers> Buffered Encoders and Decoders
