Datasheet Texas Instruments MSP430FR5726
| Manufacturer | Texas Instruments |
| Series | MSP430FR5726 |
MSP430FR5726 8 MHz ULP microcontroller with 16 KB FRAM, 1 KB SRAM, 21 IO and comparator
Datasheets
MSP430FR572x Mixed-Signal Microcontrollers datasheet
PDF, 2.2 Mb, Revision: B, File published: Apr 25, 2016
Extract from the document
Prices
Status
| MSP430FR5726IPW | MSP430FR5726IPWR | MSP430FR5726IRGER | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No |
Packaging
| MSP430FR5726IPW | MSP430FR5726IPWR | MSP430FR5726IRGER | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 28 | 28 | 24 |
| Package Type | PW | PW | RGE |
| Industry STD Term | TSSOP | TSSOP | VQFN |
| JEDEC Code | R-PDSO-G | R-PDSO-G | S-PQFP-N |
| Package QTY | 50 | 2000 | 3000 |
| Carrier | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | 430FR5726 | 430FR5726 | 5726 |
| Width (mm) | 4.4 | 4.4 | 4 |
| Length (mm) | 9.7 | 9.7 | 4 |
| Thickness (mm) | 1 | 1 | .88 |
| Pitch (mm) | .65 | .65 | .5 |
| Max Height (mm) | 1.2 | 1.2 | 1 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | MSP430FR5726IPW | MSP430FR5726IPWR | MSP430FR5726IRGER |
|---|---|---|---|
| ADC | Slope | Slope | Slope |
| AES | N/A | N/A | N/A |
| Active Power, uA/MHz | 125 | 125 | 125 |
| Additional Features | Real-Time Clock,Watchdog,Brown Out Reset,IrDA | Real-Time Clock,Watchdog,Brown Out Reset,IrDA | Real-Time Clock,Watchdog,Brown Out Reset,IrDA |
| BSL | UART | UART | UART |
| CPU | MSP430 | MSP430 | MSP430 |
| Comparators | 12 | 12 | 12 |
| DMA | 3 | 3 | 3 |
| Featured | fr5 | fr5 | fr5 |
| Frequency, MHz | 8 | 8 | 8 |
| GPIO Pins | 21 | 21 | 21 |
| I2C | 1 | 1 | 1 |
| Max VCC | 3.6 | 3.6 | 3.6 |
| Min VCC | 2 | 2 | 2 |
| Multiplier | 32x32 | 32x32 | 32x32 |
| Non-volatile Memory, KB | 16 | 16 | 16 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 |
| Package Group | TSSOP | TSSOP | VQFN |
| Package Size: mm2:W x L, PKG | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 24VQFN: 16 mm2: 4 x 4(VQFN) |
| RAM, KB | 1 | 1 | 1 |
| Rating | Catalog | Catalog | Catalog |
| SPI | 2 | 2 | 2 |
| Security Enabler | Cryptographic acceleration,Debug security,Physical security,Secure FW and SW update,Software IP protection | Cryptographic acceleration,Debug security,Physical security,Secure FW and SW update,Software IP protection | Cryptographic acceleration,Debug security,Physical security,Secure FW and SW update,Software IP protection |
| Special I/O | N/A | N/A | N/A |
| Standby Power, LPM3-uA | 6.4 | 6.4 | 6.4 |
| Timers - 16-bit | 3 | 3 | 3 |
| UART | 1 | 1 | 1 |
| Wakeup Time, us | 78 | 78 | 78 |
Eco Plan
| MSP430FR5726IPW | MSP430FR5726IPWR | MSP430FR5726IRGER | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- Over-the-Air (OTA) Update With the MSP430FR57xx (Rev. A)PDF, 3.5 Mb, Revision: A, File published: Mar 2, 2015
- MSP430 System-Level ESD ConsiderationsPDF, 1.5 Mb, File published: Mar 29, 2012
System-Level ESD has become increasingly demanding with silicon technology scaling towards lower voltages and the need for designing cost-effective and ultra-low power components. This application report addresses three different ESD topics to help board designers and OEMs understand and design robust system-level designs:(1) Component-level ESD testing and system-level ESD testing, their differ - Maximizing Write Speed on the MSP430в„ў FRAM (Rev. B)PDF, 103 Kb, Revision: B, File published: Feb 4, 2015
Nonvolatile low-power ferroelectric RAM (FRAM) is capable of extremely high-speed write accesses. This application report discusses how to maximize FRAM write speeds specifically in the MSP430FRxx family using simple techniques. The document uses examples from bench tests performed on the MSP430FR5739 device, which can be extended to all MSP430™ FRAM-based devices, and discusses tradeoffs such as - MSP430 FRAM Technology – How To and Best PracticesPDF, 326 Kb, File published: Jun 23, 2014
FRAM is a non-volatile memory technology that behaves similar to SRAM while enabling a whole host of new applications, but also changing the way firmware should be designed. This application report outlines the how to and best practices of using FRAM technology in MSP430 from an embedded software development perspective. It discusses how to implement a memory layout according to application-specif - MSP430 FRAM Quality and Reliability (Rev. A)PDF, 295 Kb, Revision: A, File published: May 1, 2014
FRAM is a nonvolatile embedded memory technology and is known for its ability to be ultra-low power while being the most flexible and easy-to-use universal memory solution available today. This application report is intended to give new FRAM users and those migrating from flash-based applications knowledge on how FRAM meets key quality and reliability requirements such as data retention and endura - Migrating from the USCI Module to the eUSCI Module (Rev. A)PDF, 41 Kb, Revision: A, File published: Sep 13, 2012
The purpose of this application report is to enable easy migration for designs based on the USCI_A and USCI_B modules to the eUSCI_A and the eUSCI_B modules. The document highlights the new features in the eUSCI module and the main differences between the USCI and the eUSCI modules. - Migrating from the MSP430F2xx Family to the MSP430FR57xx Family (Rev. A)PDF, 154 Kb, Revision: A, File published: Feb 16, 2012
This application report enables easy migration from MSP430F2xx Flash-based MCUs to the MSP430FR57xx family FRAM-based MCU. It covers programming, system, and peripheral considerations when migrating firmware. The purpose is to highlight differences between the two families. For more information on the usage of the MSP430FR57xx features, see the MSP430FR57xx Family User's Guide (Model Line
Series: MSP430FR5726 (3)Manufacturer's Classification
- Semiconductors> Microcontrollers (MCU)> MSP430 ultra-low-power MCUs> MSP430FRxx FRAM
