Datasheet Texas Instruments SN54AC00-SP

ManufacturerTexas Instruments
SeriesSN54AC00-SP
Datasheet Texas Instruments SN54AC00-SP

Quadruple 2-Input Positive-NAND Gates

Datasheets

SN54AC00-SP Radiation Hardened Quad 2 Input NAND Gate datasheet
PDF, 295 Kb, Revision: B, File published: Feb 9, 2015
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Prices

Status

5962-8754903VCA5962-8754903VDA5962R8754903V9A5962R8754903VCA5962R8754903VDA
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNo

Packaging

5962-8754903VCA5962-8754903VDA5962R8754903V9A5962R8754903VCA5962R8754903VDA
N12345
Pin14141414
Package TypeJWKGDJW
Industry STD TermCDIPCFPCDIPCFP
JEDEC CodeR-GDIP-TR-GDFP-FR-GDIP-TR-GDFP-F
Package QTY1195251
CarrierTUBETUBETUBETUBETUBE
Width (mm)6.675.976.675.97
Length (mm)19.569.2119.569.21
Thickness (mm)4.571.594.571.59
Pitch (mm)2.541.272.541.27
Max Height (mm)5.082.035.082.03
Mechanical DataDownloadDownloadDownloadDownload
Device MarkingAA

Parametrics

Parameters / Models5962-8754903VCA
5962-8754903VCA
5962-8754903VDA
5962-8754903VDA
5962R8754903V9A
5962R8754903V9A
5962R8754903VCA
5962R8754903VCA
5962R8754903VDA
5962R8754903VDA
Bits44444
F @ Nom Voltage(Max), Mhz100100100100100
ICC @ Nom Voltage(Max), mA0.040.040.040.040.04
Input TypeCMOSCMOSCMOSCMOSCMOS
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-24
Output TypeCMOSCMOSCMOSCMOSCMOS
Package GroupCDIPCFPCDIP,CFPCDIPCFP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)See datasheet (CFP)See datasheet (CDIP),See datasheet (CFP)See datasheet (CDIP)See datasheet (CFP)
RatingSpaceSpaceSpaceSpaceSpace
Schmitt TriggerNoNoNoNoNo
Technology FamilyACACACACAC
VCC(Max), V66666
VCC(Min), V22222
tpd @ Nom Voltage(Max), ns11,711,711,711,711,7

Eco Plan

5962-8754903VCA5962-8754903VDA5962R8754903V9A5962R8754903VCA5962R8754903VDA
RoHSSee ti.comSee ti.comSee ti.comSee ti.comSee ti.com

Application Notes

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    PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, File published: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • TI IBIS File Creation Validation and Distribution Processes
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    PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
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    PDF, 1.7 Mb, File published: Oct 1, 1996
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    PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
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  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors> Space & High Reliability> Logic Products> Gate Products
EMS supplier