Datasheet Texas Instruments SN54AS867

ManufacturerTexas Instruments
SeriesSN54AS867
Datasheet Texas Instruments SN54AS867

Synchronous 8-Bit Up/Down Counters

Datasheets

Synchronous 8-Bit Up/Down Counters datasheet
PDF, 367 Kb, Revision: C, File published: Jan 1, 1995
Extract from the document

Prices

Status

5962-8966801LASN54AS867JTSNJ54AS867JT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNo

Packaging

5962-8966801LASN54AS867JTSNJ54AS867JT
N123
Pin242424
Package TypeJTJTJT
Industry STD TermCDIPCDIPCDIP
JEDEC CodeR-GDIP-TR-GDIP-TR-GDIP-T
Package QTY111
CarrierTUBETUBETUBE
Width (mm)6.926.926.92
Length (mm)323232
Thickness (mm)4.74.74.7
Pitch (mm)2.542.542.54
Max Height (mm)5.085.085.08
Mechanical DataDownloadDownloadDownload
Device MarkingSN54AS867JT5962-8966801LA

Parametrics

Parameters / Models5962-8966801LA
5962-8966801LA
SN54AS867JT
SN54AS867JT
SNJ54AS867JT
SNJ54AS867JT
Bits888
F @ Nom Voltage(Max), Mhz125125125
FunctionCounterCounterCounter
ICC @ Nom Voltage(Max), mA195195195
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA20/-220/-220/-2
Package GroupCDIPCDIPCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)See datasheet (CDIP)See datasheet (CDIP)
RatingMilitaryMilitaryMilitary
Schmitt TriggerNoNoNo
Technology FamilyASASAS
TypeBinaryBinaryBinary
VCC(Max), V5.55.55.5
VCC(Min), V4.54.54.5
Voltage(Nom), V555
tpd @ Nom Voltage(Max), ns222222

Eco Plan

5962-8966801LASN54AS867JTSNJ54AS867JT
RoHSSee ti.comSee ti.comSee ti.com

Application Notes

  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, File published: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
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    PDF, 1.9 Mb, File published: Aug 1, 1995
    This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, File published: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
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    PDF, 277 Kb, File published: Feb 1, 1997
    Designers of high-speed systems that include advanced Schottky (AS) devices must consider the operating environment in their work. They must be aware of the individual device characteristics and their interaction with other devices. This document provides a detailed discussion of the waveform characteristics equivalent circuit models transmission line fanout and termination for AS load manageme
  • Live Insertion
    PDF, 150 Kb, File published: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, File published: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Introduction to Logic
    PDF, 93 Kb, File published: Apr 30, 2015

Model Line

Manufacturer's Classification

  • Semiconductors> Space & High Reliability> Logic Products> Specialty Logic Products> Counter/Arithmetic/Parity Function Products
EMS supplier