Datasheet Texas Instruments SN65LVDS390
| Manufacturer | Texas Instruments |
| Series | SN65LVDS390 |

Quad LVDS Receiver
Datasheets
High-Speed Differential Line Receivers. datasheet
PDF, 1.7 Mb, Revision: I, File published: Jul 29, 2014
Extract from the document
Status
| SN65LVDS390D | SN65LVDS390DG4 | SN65LVDS390DR | SN65LVDS390DRG4 | SN65LVDS390PW | SN65LVDS390PWG4 | SN65LVDS390PWR | SN65LVDS390PWRG4 | |
|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes | No | Yes | No | Yes | No | No |
Packaging
| SN65LVDS390D | SN65LVDS390DG4 | SN65LVDS390DR | SN65LVDS390DRG4 | SN65LVDS390PW | SN65LVDS390PWG4 | SN65LVDS390PWR | SN65LVDS390PWRG4 | |
|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
| Pin | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
| Package Type | D | D | D | D | PW | PW | PW | PW |
| Industry STD Term | SOIC | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 40 | 40 | 2500 | 2500 | 90 | 90 | 2000 | 2000 |
| Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | LVDS390 | LVDS390 | LVDS390 | LVDS390 | LVDS390 | LVDS390 | LVDS390 | LVDS390 |
| Width (mm) | 3.91 | 3.91 | 3.91 | 3.91 | 4.4 | 4.4 | 4.4 | 4.4 |
| Length (mm) | 9.9 | 9.9 | 9.9 | 9.9 | 5 | 5 | 5 | 5 |
| Thickness (mm) | 1.58 | 1.58 | 1.58 | 1.58 | 1 | 1 | 1 | 1 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 |
| Max Height (mm) | 1.75 | 1.75 | 1.75 | 1.75 | 1.2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Download | Download | Download | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | SN65LVDS390D![]() | SN65LVDS390DG4![]() | SN65LVDS390DR![]() | SN65LVDS390DRG4![]() | SN65LVDS390PW![]() | SN65LVDS390PWG4![]() | SN65LVDS390PWR![]() | SN65LVDS390PWRG4![]() |
|---|---|---|---|---|---|---|---|---|
| Device Type | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver |
| ESD HBM, kV | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 |
| Function | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver |
| ICC(Max), mA | 18 | 18 | 18 | 18 | 18 | 18 | 18 | 18 |
| Input Signal | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS |
| No. of Rx | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Signal | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL |
| Package Group | SOIC | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) |
| Protocols | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS |
| Signaling Rate, Mbps | 200 | 200 | 200 | 200 | 200 | 200 | 200 | 200 |
Eco Plan
| SN65LVDS390D | SN65LVDS390DG4 | SN65LVDS390DR | SN65LVDS390DRG4 | SN65LVDS390PW | SN65LVDS390PWG4 | SN65LVDS390PWR | SN65LVDS390PWRG4 | |
|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Model Line
Series: SN65LVDS390 (8)
Manufacturer's Classification
- Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)