Datasheet Texas Instruments TLV2545

ManufacturerTexas Instruments
SeriesTLV2545
Datasheet Texas Instruments TLV2545

12-Bit, 200 kSPS ADC, Ser. Out, TMS320 Compatible (up to 10MHz), Single Ch. Pseudo-Differential

Datasheets

2.7 V to 5.5 V Low-Power 12-Bit 140/200 KSPS, Serial Analog-To-Digital Converter datasheet
PDF, 1.2 Mb, Revision: E, File published: Apr 12, 2010
Extract from the document

Prices

Status

TLV2545CDGKTLV2545IDTLV2545IDGK
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNo

Packaging

TLV2545CDGKTLV2545IDTLV2545IDGK
N123
Pin888
Package TypeDGKDDGK
Industry STD TermVSSOPSOICVSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY807580
CarrierTUBETUBETUBE
Device MarkingAHD2545IAHE
Width (mm)33.913
Length (mm)34.93
Thickness (mm).971.58.97
Pitch (mm).651.27.65
Max Height (mm)1.071.751.07
Mechanical DataDownloadDownloadDownload

Parametrics

Parameters / ModelsTLV2545CDGK
TLV2545CDGK
TLV2545ID
TLV2545ID
TLV2545IDGK
TLV2545IDGK
# Input Channels111
Analog Voltage AVDD(Max), V5.55.55.5
Analog Voltage AVDD(Min), V2.72.72.7
ArchitectureSARSARSAR
Digital Supply(Max), V5.55.55.5
Digital Supply(Min), V2.72.72.7
INL(Max), +/-LSB111
Input Range(Max), V5.55.55.5
Input TypePseudo-DifferentialPseudo-DifferentialPseudo-Differential
Integrated FeaturesOscillatorOscillatorOscillator
InterfaceSPISPISPI
Multi-Channel ConfigurationN/AN/AN/A
Operating Temperature Range, C0 to 70,-40 to 850 to 70,-40 to 850 to 70,-40 to 85
Package GroupVSSOPSOICVSSOP
Package Size: mm2:W x L, PKG8VSSOP: 15 mm2: 4.9 x 3(VSSOP)8SOIC: 29 mm2: 6 x 4.9(SOIC)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)
Power Consumption(Typ), mW2.82.82.8
RatingCatalogCatalogCatalog
Reference ModeExtExtExt
Resolution, Bits121212
SINAD, dB727272
SNR, dB727272
Sample Rate (max), SPS200kSPS200kSPS200kSPS
Sample Rate(Max), MSPS0.20.20.2
THD(Typ), dB-84-84-84

Eco Plan

TLV2545CDGKTLV2545IDTLV2545IDGK
RoHSCompliantCompliantCompliant

Application Notes

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Model Line

Series: TLV2545 (3)

Manufacturer's Classification

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)
EMS supplier