Datasheet Microchip TP0620
| Manufacturer | Microchip |
| Series | TP0620 |
This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process
Datasheets
TP0620 Datasheet - P-Channel Enhancement-Mode Vertical DMOS FET
PDF, 618 Kb, Revision: 06-27-2014
Extract from the document
Status
| TP0620N3-G | |
|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) |
Packaging
| TP0620N3-G | |
|---|---|
| N | 1 |
| Package | TO-92 |
| Pins | 3 |
Parametrics
| Parameters / Models | TP0620N3-G |
|---|---|
| BVdss min, V | -200 |
| CISSmax, pF | 150 |
| Operating Temperature Range, °C | -55 to +150 |
| Rds, on) max | 12 |
| Vgs(th) max, V | -2.4 |
Eco Plan
| TP0620N3-G | |
|---|---|
| RoHS | Compliant |
Model Line
Series: TP0620 (1)