Datasheet Microchip TP2424N8-G
| Manufacturer | Microchip |
| Series | TP2424 |
| Part Number | TP2424N8-G |
This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven silicon-gate manufacturing process
Datasheets
TP2424 Datasheet - P-Channel Enhancement-Mode Vertical DMOS FET
PDF, 552 Kb, Revision: 06-27-2014
Extract from the document
Status
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) |
Packaging
| Package | SOT-89 |
| Pins | 3 |
Parametrics
| BVdss min | -240 V |
| CISSmax | 200 pF |
| Operating Temperature Range | -55 to +150 °C |
| Rds | 8 on) max |
| Vgs(th) max | -2.4 V |
Eco Plan
| RoHS | Compliant |
Model Line
Series: TP2424 (1)
- TP2424N8-G
Other Names:
TP2424N8G, TP2424N8 G