Datasheet Microchip TP2435
| Manufacturer | Microchip |
| Series | TP2435 |
This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven silicon-gate manufacturing process
Datasheets
TP2435 Datasheet - P-Channel Enhancement-Mode Vertical DMOS FET
PDF, 632 Kb, Revision: 06-27-2014
Extract from the document
Status
| TP2435N8-G | |
|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) |
Packaging
| TP2435N8-G | |
|---|---|
| N | 1 |
| Package | SOT-89 |
| Pins | 3 |
Parametrics
| Parameters / Models | TP2435N8-G |
|---|---|
| BVdss min, V | -350 |
| CISSmax, pF | 200 |
| Operating Temperature Range, °C | -55 to +150 |
| Rds, on) max | 15 |
| Vgs(th) max, V | -2.4 |
Eco Plan
| TP2435N8-G | |
|---|---|
| RoHS | Compliant |
Model Line
Series: TP2435 (1)