Datasheet Microchip TP5322
| Manufacturer | Microchip |
| Series | TP5322 |
TP5322 is a low threshold enhancement-mode (normally-off) transistor utilizing an advanced vertical DMOS structure and well-proven silicon-gate manufacturing process
Datasheets
TP5322 Datasheet - P-Channel Enhancement-Mode Vertical DMOS FET
PDF, 678 Kb, Revision: 06-27-2014
Extract from the document
Status
| TP5322K1-G | TP5322N8-G | |
|---|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
Packaging
| TP5322K1-G | TP5322N8-G | |
|---|---|---|
| N | 1 | 2 |
| Package | SOT-23 | SOT-89 |
| Pins | 3 | 3 |
Parametrics
| Parameters / Models | TP5322K1-G | TP5322N8-G |
|---|---|---|
| BVdss min, V | -220 | -220 |
| CISSmax, pF | 110 | 110 |
| Operating Temperature Range, °C | -55 to +150 | -55 to +150 |
| Rds, on) max | 12 | 12 |
| Vgs(th) max, V | -2.4 | -2.4 |
Eco Plan
| TP5322K1-G | TP5322N8-G | |
|---|---|---|
| RoHS | Compliant | Compliant |
Model Line
Series: TP5322 (2)