Datasheet Intersil HCS109MS

DATASHEET
HCS109MS FN2466
Rev 2.00
September 1995 Radiation Hardened Dual JK Flip Flop Features Pinouts 3 Micron Radiation Hardened SOS CMOS 16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 Military Temperature Range: -55 oC to 16 VCC J1 2 15 R2 3 14 J2 CP1 4 13 K2 S1 5 12 CP2 Q1 6 11 S2 Q1 7 10 Q2 GND 8 9 Q2 Cosmic Ray Upset Immunity < 2 x 10-9 Errors/Bit-Day
(Typ) Latch-Up Free Under Any Conditions 1 K1 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse R1 +125oC Significant Power Reduction Compared to LSTTL ICs 16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW DC Operating Voltage Range: 4.5V to 5.5V Input Logic Levels
-VIL = 30% of VCC Max
-VIH = 70% of VCC Min R1 1 16 VCC J1 2 15 R2 K1 3 14 J2 CP1 4 13 K2 Description S1 5 12 CP2 The Intersil HCS109MS is a Radiation Hardened Dual JK
Flip Flop with set and reset. The flip flop changes state with
the positive transition of the clock (CP1 or CP2). Q1 6 11 S2 Q1 7 10 Q2 GND 8 9 Q2 Input Current Levels Ii п‚Ј 5пЃ­A at VOL, VOH The HCS109MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS109MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix). Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE HCS109DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP HCS109KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack HCS109D/Sample +25oC Sample 16 Lead SBDIP HCS109K/Sample +25oC Sample 16 Lead Ceramic Flatpack HCS109HMSR +25oC Die Die FN2466 Rev 2.00
September 1995 Page 1 of 9 HCS109MS Functional Diagram
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