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Datasheet Intersil HCS573MS

ManufacturerIntersil
SeriesHCS573MS

CMOS Octal Transparent Latch, Three-State

Datasheets

  • Download » Datasheet PDF, 383 Kb, Revision: 2017-12-21
    HCS573MS Datasheet
    Docket ↓
    DATASHEET
    HCS573MS FN4056
    Rev 0.00
    September 1995 Radiation Hardened Octal Transparent Latch, Three-State Features Pinouts
    20 LEAD CERAMIC DUAL-IN-LINE
    METAL SEAL PACKAGE (SBDIP)
    MIL-STD-1835 CDIP2-T20, LEAD FINISH C
    TOP VIEW 3 Micron Radiation Hardened SOS CMOS
    Total Dose 200K RAD (Si)
    SEP Effective LET No Upsets: >100 MEV-cm2/mg
    Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
    Bit-Day (Typ)
    Dose Rate Survivability: >1 x 1012 RAD (Si)/s
    Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
    Latch-Up Free Under Any Conditions
    Fanout (Over Temperature Range)
    -Bus Driver Outputs -15 LSTTL Loads
    Military Temperature Range: -55oC to +125oC
    Significant Power Reduction Compared to LSTTL ICs
    DC Operating Voltage Range: 4.5V to 5.5V
    Input Logic Levels
    -VIL = 0.3 VCC Max
    -VIH = 0.7 VCC Min ...

Prices

Packaging

HCS573KMSR
Package20 Ld CFP
Package Outline Drawing
Package IndexK20.A
Pin Count20
FamilyCFP

Parametrics

HCS573KMSR
ClassV
DLA SMD5962-95794
DescriptionCMOS Octal Transparent Latch, Three-State
High Dose Rate (HDR) krad(Si)200
Low Dose Rate (ELDRS) krad(Si)ELDRS free
Operating Temperature Range-55 to 125
Qualification LevelQML Class V (space)
SEL (MeV/mg/cm2)SEL free

Eco Plan

HCS573KMSR
RoHSCompliant

Moldel Line

Series: HCS573MS (1)

Manufacturer's Classification

  • Space & Harsh Environment > Rad Hard Digital > RH Latches

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