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Datasheet Microchip SY89420V

ManufacturerMicrochip
SeriesSY89420V

The SY89420V device consists of two identical, low jitter, digital Phase Locked Loops based on Micrel-Synergy's differential PLL technology

Datasheets

  • Download » Datasheet PDF, 80 Kb, File published: Nov 11, 2015
    SY89420V Data Sheet
    Docket ↓
    5V/3.3V DUAL
    PHASE LOCKED LOOP FEATURES DESCRIPTION в–  3.3V and 5V power supply options
    в–  1.12GHz maximum VCO frequency
    в–  30MHz to 560MHz reference input operating
    frequency
    в–  Frequency doubler mode
    в–  Low jitter design
    в–  PECL differential outputs
    в–  PECL and TTL reference voltages available
    в–  External loop filter optimizes performance/cost
    в–  Available in 28-pin PLCC package The SY89420V device consists of two identical, low
    jitter, digital Phase Locked Loops based on Micrel-Synergy's
    differential PLL technology. Each of the PLLs (PLLA and
    PLLB) is capable of operating in the 30MHz to 560MHz
    input reference frequency range independently of the other
    and is configurable separately. The PLLs can be configured
    to be matched in all regards, or can be configured so that
    PLLB is used as a frequency doubler, while PLLA is used
    to regenerate the undoubled frequency.
    Two reference inputs (RINX and RINX), two feedback
    inputs (FINX and FINX), two filter pins (F1X and F2X) and
    two differential outputs (FOUTX and FOUTX) are provided
    for each of the two PLLs. The reference and feedback ...

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Manufacturer's Classification

  • Clock and Timing > Clock Generation > Clock Synthesizers

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