Datasheet Analog Devices AD9542

ManufacturerAnalog Devices
SeriesAD9542

Dual DPLL, Quad Input, 10 Output, Multiservice Line Card Clock Translator and Jitter Cleaner

Datasheets

AD9542: Quad Input, Five-Output, Dual DPLL Synchronizer and Adaptive Clock Translator Data Sheet
PDF, 1.3 Mb, Revision: 0, File uploaded: Dec 25, 2018
Docket

Prices

Status

AD9542BCPZAD9542BCPZ-REEL7
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)

Packaging

AD9542BCPZAD9542BCPZ-REEL7
Package48 ld LFCSP (7x7x.85mm w/5.6mm Pad)48 ld LFCSP (7x7x.85mm w/5.6mm Pad)
Pins4848
Package CodeCP-48-13CP-48-13

Parametrics

Parameters / ModelsAD9542BCPZAD9542BCPZ-REEL7
# Outputs1010
Clock FunctionGeneration, SynchronizationGeneration, Synchronization
InterfaceI²C, Serial, SPII²C, Serial, SPI
On-Chip VCO or DCOYesYes
Operating Temperature Range, °C-40 to 85-40 to 85
Output Frequency(max), Hz500M500M
Output LogicCML, HCSL, LVDSCML, HCSL, LVDS
Power(typ), W560m560m
Ref Clock(max), Hz750M750M
Ref Clock(min), Hz2k2k

Eco Plan

AD9542BCPZAD9542BCPZ-REEL7
RoHSCompliantCompliant

Model Line

Series: AD9542 (2)

Manufacturer's Classification