Datasheet Texas Instruments CDCVF857DGG
| Manufacturer | Texas Instruments |
| Series | CDCVF857 |
| Part Number | CDCVF857DGG |
2.5 V Phase Lock Loop DDR Clock Driver 48-TSSOP -40 to 85
Datasheets
2.5V Phase-Lock Loop Clock Driver datasheet
PDF, 1.0 Mb, Revision: F, File published: May 11, 2007
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 48 |
| Package Type | DGG |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 40 |
| Carrier | TUBE |
| Device Marking | CDCVF857 |
| Width (mm) | 6.1 |
| Length (mm) | 12.5 |
| Thickness (mm) | 1.15 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| Absolute Jitter (Peak-to-Peak Cycle or Period Jitter) | 30 ps |
| Number of Outputs | 10 |
| Operating Frequency Range(Max) | 220 MHz |
| Operating Frequency Range(Min) | 60 MHz |
| Operating Temperature Range | -40 to 85 C |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG |
| Rating | Catalog |
| VCC | 2.5 V |
| t(phase error) | 50 ps |
| tsk(o) | 75 ps |
Eco Plan
| RoHS | Compliant |
Model Line
Series: CDCVF857 (12)
Manufacturer's Classification
- Semiconductors > Clock and Timing > Clock Buffers > Zero Delay Buffers
