Datasheet MCP6141, MCP6142, MCP6143, MCP6144 (Microchip)

ManufacturerMicrochip
DescriptionThe MCP6141 is a single 600 nA op amp offering rail-to-rail input & output over the 1.4 to 5.5V operating range
Pages / Page38 / 1 — MCP6141/2/3/4. 600 nA, Non-Unity Gain Rail-to-Rail Input/Output Op Amps. …
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MCP6141/2/3/4. 600 nA, Non-Unity Gain Rail-to-Rail Input/Output Op Amps. Features:. Description:. Applications:. Design Aids:

Datasheet MCP6141, MCP6142, MCP6143, MCP6144 Microchip

Model Line for this Datasheet

Text Version of Document

MCP6141/2/3/4 600 nA, Non-Unity Gain Rail-to-Rail Input/Output Op Amps Features: Description:
• Low Quiescent Current: 600 nA/amplifier (typical) The MCP6141/2/3/4 family of non-unity gain stable • Gain Bandwidth Product: 100 kHz (typical) operational amplifiers (op amps) from Microchip • Stable for gains of 10 V/V or higher Technology Inc. operate with a single supply voltage as low as 1.4V, while drawing less than 1 µA (maximum) • Rail-to-Rail Input/Output of quiescent current per amplifier. These devices are • Wide Supply Voltage Range: 1.4V to 6.0V also designed to support rail-to-rail input and output • Available in Single, Dual, and Quad operation. This combination of features supports • Chip Select (CS) with MCP6143 battery-powered and portable applications. • Available in 5-lead and 6-lead SOT-23 Packages The MCP6141/2/3/4 amplifiers have a gain bandwidth • Temperature Ranges: product of 100 kHz (typical) and are stable for gains of - Industrial: -40°C to +85°C 10 V/V or higher. These specifications make these op - Extended: -40°C to +125°C amps appropriate for battery powered applications where a higher frequency response from the amplifier is required.
Applications:
The MCP6141/2/3/4 family operational amplifiers are • Toll Booth Tags offered in single (MCP6141), single with Chip Select • Wearable Products (CS) (MCP6143), dual (MCP6142) and quad • Temperature Measurement (MCP6144) configurations. The MCP6141 device is • Battery Powered available in the 5-lead SOT-23 package, and the MCP6143 device is available in the 6-lead SOT-23 package.
Design Aids:
• SPICE Macro Models
Package Types
• FilterLab® Software
MCP6141 MCP6143
• Mindi™ Simulation Tool PDIP, SOIC, MSOP PDIP, SOIC, MSOP • Microchip Advanced Part Selector (MAPS) NC 1 8 NC NC 1 8 CS • Analog Demonstration and Evaluation Boards VIN– 2 7 VDD VIN– 2 7 VDD • Application Notes VIN+ 3 6 VOUT VIN+ 3 6 VOUT V 4 5 NC V 4 5 NC
Related Devices:
SS SS • MCP6041/2/3/4: Unity Gain Stable Op Amps
MCP6141 MCP6143
SOT-23-5 SOT-23-6
Typical Application
V 1 5 OUT VDD V 1 6 OUT VDD VSS 2 VSS 2 5 CS R1 VIN+ 3 4 VIN– VIN+ 3 4 VIN– V1 R
MCP6142 MCP6144
2 PDIP, SOIC, MSOP PDIP, SOIC, TSSOP V R 2 F R V V 1 8 OUTA V V 1 14 OUTA V 3 OUT DD OUTD V V 2 7 V V 2 13 V 3 INA– OUTB INA– IND–
MCP614X
V 3 12 INA+ 3 6 VINB– VINA+ VIND+ 4 5 V 4 11 V V VSS VINB+ DD SS REF VINB+ 5 10 VINC+ 6 9
Inverting, Summing Amplifier
VINB– VINC– VOUTB 7 8 VOUTC © 2009 Microchip Technology Inc. DS21668D-page 1 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: Chip Select (CS) Timing Diagram (MCP6143 only). 1.1 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift with TA = -40°C to +85°C. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.4V. FIGURE 2-4: Input Offset Voltage Drift with TA = +85°C to +125°C and VDD = 1.4V. FIGURE 2-5: Input Offset Voltage Drift with TA = +85°C to +125°C and VDD = 5.5V. FIGURE 2-6: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-7: Input Offset Voltage vs. Output Voltage. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: The MCP6141/2/3/4 Family Shows No Phase Reversal. FIGURE 2-11: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-12: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-13: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-14: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-15: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-16: Input Bias, Offset Currents vs. Common Mode Input Voltage. FIGURE 2-17: DC Open-Loop Gain vs. Load Resistance. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-19: Channel to Channel Separation vs. Frequency (MCP6142 and MCP6144 only). FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 1.4V. FIGURE 2-21: Quiescent Current vs. Power Supply Voltage. FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage. FIGURE 2-23: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-24: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-25: Output Voltage Headroom vs. Output Current Magnitude. FIGURE 2-26: Slew Rate vs. Ambient Temperature. FIGURE 2-27: Small Signal Non-inverting Pulse Response. FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-29: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-30: Small Signal Inverting Pulse Response. FIGURE 2-31: Large Signal Non-inverting Pulse Response. FIGURE 2-32: Chip Select (CS) to Amplifier Output Response Time (MCP6143 only). FIGURE 2-33: Input Current vs. Input Voltage (Below VSS). FIGURE 2-34: Large Signal Inverting Pulse Response. FIGURE 2-35: Internal Chip Select (CS) Hysteresis (MCP6143 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 CS Digital Input 3.4 Power Supply Pins 4.0 Applications Information 4.1 Rail-to-Rail Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Output Loads and Battery Life 4.4 Stability FIGURE 4-3: Noise Gain for Non-inverting Gain Configuration. FIGURE 4-4: Noise Gain for Inverting Gain Configuration. FIGURE 4-5: Examples of Unstable Circuits for the MCP6141/2/3/4 Family. FIGURE 4-6: Output Resistor, RISO stabilizes large capacitive loads. FIGURE 4-7: Recommended RISO Values for Capacitive Loads. 4.5 MCP6143 Chip Select 4.6 Supply Bypass 4.7 Unused Op Amps FIGURE 4-8: Unused Op Amps. 4.8 PCB Surface Leakage FIGURE 4-9: Example Guard Ring Layout for Inverting Gain. 4.9 Application Circuits FIGURE 4-10: High Side Battery Current Sensor. FIGURE 4-11: Summing Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Simulation Tool 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information
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