Datasheet MCP660, MCP661, MCP662, MCP663, MCP664, MCP665, MCP669 (Microchip)

ManufacturerMicrochip
DescriptionThe MCP66x family of operational amplifiers features high gain bandwidth product, and high output short circuit current
Pages / Page68 / 1 — MCP660/1/2/3/4/5/9. 60 MHz, 32 V/µs Rail-to-Rail Output (RRO) Op Amps. …
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MCP660/1/2/3/4/5/9. 60 MHz, 32 V/µs Rail-to-Rail Output (RRO) Op Amps. Features:. Description:. Typical Application Circuit

Datasheet MCP660, MCP661, MCP662, MCP663, MCP664, MCP665, MCP669 Microchip

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MCP660/1/2/3/4/5/9 60 MHz, 32 V/µs Rail-to-Rail Output (RRO) Op Amps Features: Description:
• Gain-Bandwidth Product: 60 MHz (typical) The Microchip Technology Inc. MCP660/1/2/3/4/5/9 • Slew Rate: 32 V/µs (typical) family of operational amplifiers (op amps) features high • Noise: 6.8 nV/Hz (typical, at 1 MHz) gain-bandwidth product and high slew rate. Some also provide a Chip Select pin (CS) that supports a low- • Short Circuit Current: 90 mA (typical) power mode of operation. These amplifiers are • Low Input Bias Current: 4 pA (typical) optimized for high speed, low noise and distortion, • Ease of Use: single-supply operation with rail-to-rail output and an - Unity-Gain Stable input that includes the negative rail. - Rail-to-Rail Output This family is offered in single (MCP661), single with - Input Range including Negative Rail CS pin (MCP663), dual (MCP662) and dual with two - No Phase Reversal CS pins (MCP665), triple (MCP660), quad (MCP664) and quad with two CS pins (MCP669). All devices are • Supply Voltage Range: +2.5V to +5.5V fully specified from -40°C to +125°C. • High Output Current: ±70 mA • Supply Current: 6.0 mA/ch (typical)
Typical Application Circuit
• Low-Power Mode: 1 µA/ch • Smal Packages: SOT23-5, DFN R R G RF ISO • Extended Temperature Range: -40°C to +125°C VREF VOUT
-
CL R
Typical Applications:
L VIN
+
• Multi-Pole Active Filter
MCP66X
• Driving A/D Converters • Power Amplifier Control Loops
100
• Line Driver • Video Amplifier

• Barcode Scanners
ISO
• Optical Detector Amplifier
10 Design Aids: G = +1 N G • N
• SPICE Macro Models
Recommended R
• FilterLab® Software
1
• Microchip Advanced Part Selector (MAPS)
1.E-11 10p 1.E-10 100p 1.E-09 1n 1.E-08 10n Normalized Capacitance; C /G (F)
• Analog Demonstration and Evaluation Boards
L N
- MCP661DM-LD • Application Notes
High Gain-Bandwidth Op Amp Portfolio Model Family Channels/Package Gain-Bandwidth VOS (max.) IQ/Ch (typ.)
MCP621/1S/2/3/4/5/9 1, 2, 4 20 MHz 0.2 mV 2.5 mA MCP631/2/3/4/5/9 1, 2, 4 24 MHz 8.0 mV 2.5 mA MCP651/1S/2/3/4/5/9 1, 2, 4 50 MHz 0.2 mV 6.0 mA MCP660/1/2/3/4/5/9 1, 2, 3, 4 60 MHz 8.0 mV 6.0 mA  2009-2014 Microchip Technology Inc. DS20002194E-page 1 Document Outline 60 MHz, 32 V/µs Rail-to-Rail Output (RRO) Op Amps Features: Typical Applications: Design Aids: Description: Typical Application Circuit High Gain-Bandwidth Op Amp Portfolio Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications DC Electrical Specifications AC Electrical Specifications Digital Electrical Specifications Temperature Specifications 1.3 Timing Diagram FIGURE 1-1: Timing Diagram. 1.4 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves 2.1 DC Signal Inputs FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Power Supply Voltage with VCM = 0V. FIGURE 2-4: Input Offset Voltage vs. Output Voltage. FIGURE 2-5: Low-Input Common-Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-6: High-Input Common-Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-7: Input Offset Voltage vs. Common-Mode Voltage with VDD = 2.5V. FIGURE 2-8: Input Offset Voltage vs. Common-Mode Voltage with VDD = 5.5V. FIGURE 2-9: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-10: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-11: DC Open-Loop Gain vs. Load Resistance. FIGURE 2-12: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-13: Input Bias Current vs. Input Voltage (below VSS). FIGURE 2-14: Input Bias and Offset Currents vs. Common-Mode Input Voltage with TA = +85°C. FIGURE 2-15: Input Bias and Offset Currents vs. Common-Mode Input Voltage with TA = +125°C. 2.2 Other DC Voltages and Currents FIGURE 2-16: Output Voltage Headroom vs. Output Current. FIGURE 2-17: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-18: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-19: Supply Current vs. Power Supply Voltage. FIGURE 2-20: Supply Current vs. Common-Mode Input Voltage. 2.3 Frequency Response FIGURE 2-21: CMRR and PSRR vs. Frequency. FIGURE 2-22: Open-Loop Gain vs. Frequency. FIGURE 2-23: Gain-Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-24: Gain-Bandwidth Product and Phase Margin vs. Common-Mode Input Voltage. FIGURE 2-25: Gain-Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-26: Closed-Loop Output Impedance vs. Frequency. FIGURE 2-27: Gain Peaking vs. Normalized Capacitive Load. FIGURE 2-28: Channel-to-Channel Separation vs. Frequency. 2.4 Noise and Distortion FIGURE 2-29: Input Noise Voltage Density vs. Frequency. FIGURE 2-30: Input Noise Voltage Density vs. Input Common-Mode Voltage with f = 100 Hz. FIGURE 2-31: Input Noise Voltage Density vs. Input Common-Mode Voltage with f = 1 MHz. FIGURE 2-32: Input Noise vs. Time with 0.1 Hz Filter. FIGURE 2-33: THD+N vs. Frequency. FIGURE 2-34: Change in Gain Magnitude and Phase vs. DC Input Voltage. 2.5 Time Response FIGURE 2-35: Non-Inverting Small Signal Step Response. FIGURE 2-36: Non-Inverting Large Signal Step Response. FIGURE 2-37: Inverting Small Signal Step Response. FIGURE 2-38: Inverting Large Signal Step Response. FIGURE 2-39: The MCP660/1/2/3/4/5/9 Family Shows No Input Phase Reversal with Overdrive. FIGURE 2-40: Slew Rate vs. Ambient Temperature. FIGURE 2-41: Maximum Output Voltage Swing vs. Frequency. 2.6 Chip Select Response FIGURE 2-42: CS Current vs. Power Supply Voltage. FIGURE 2-43: CS and Output Voltages vs. Time with VDD = 2.5V. FIGURE 2-44: CS and Output Voltages vs. Time with VDD = 5.5V. FIGURE 2-45: CS Hysteresis vs. Ambient Temperature. FIGURE 2-46: CS Turn-On Time vs. Ambient Temperature. FIGURE 2-47: CS’s Pull-Down Resistor (RPD) vs. Ambient Temperature. FIGURE 2-48: Quiescent Current in Shutdown vs. Power Supply Voltage. FIGURE 2-49: Output Leakage Current vs. Output Voltage. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Chip Select Digital Input (CS) 3.5 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Unity-Gain Voltage Limitations for Linear Operation. 4.2 Rail-to-Rail Output FIGURE 4-4: Output Current. FIGURE 4-5: Diagram for Power Calculations. 4.3 Distortion 4.4 Improving Stability FIGURE 4-6: Output Resistor, RISO, Stabilizes Large Capacitive Loads. FIGURE 4-7: Recommended RISO Values for Capacitive Loads. FIGURE 4-8: Amplifier with Parasitic Capacitance. FIGURE 4-9: Maximum Recommended RF vs. Gain. 4.5 MCP663 and MCP665 Chip Select 4.6 Power Supply 4.7 High Speed PCB Layout 4.8 Typical Applications FIGURE 4-10: 50W Line Driver. FIGURE 4-11: Transimpedance Amplifier for an Optical Detector. FIGURE 4-12: H-Bridge Driver. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Design and Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service
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