Datasheet AD8021 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Low Noise, High Speed Amplifier for 16-Bit Systems |
| Pages / Page | 30 / 10 — AD8021. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. LOGIC. REFERENCE. … |
| Revision | F |
| File Format / Size | PDF / 466 Kb |
| Document Language | English |
AD8021. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. LOGIC. REFERENCE. DISABLE. –IN 2. 7 +VS. +IN 3. 6 VOUT. –VS 4. 5 CCOMP
Model Line for this Datasheet
AD8021
Text Version of Document
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AD8021 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS LOGIC AD8021 1 8 REFERENCE DISABLE –IN 2 7 +VS +IN 3 6 VOUT –VS 4 5 CCOMP
01888-003 Figure 4. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 LOGIC REFERENCE Reference for Pin 81 Voltage Level. Connect to logic low supply. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply Voltage. 5 CCOMP Compensation Capacitor. Tie to −VS. (See the Applications section for value.) 6 VOUT Output. 7 +VS Positive Supply Voltage. 8 DISABLE Disable, Active Low. 1 When Pin 8 (DISABLE) is higher than Pin 1 (LOGIC REFERENCE) by approximately 2 V or more, the part is enabled. When Pin 8 is brought down to within about 1.5 V of Pin 1, the part is disabled. (See the Specifications tables for exact disable and enable voltage levels.) If the disable feature is not going to be used, Pin 8 can be tied to +VS or a logic high source, and Pin 1 can be tied to ground or logic low. Alternatively, if Pin 1 and Pin 8 are not connected, the part is in an enabled state. Rev. F | Page 8 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS USING THE DISABLE FEATURE THEORY OF OPERATION PCB LAYOUT CONSIDERATIONS DRIVING 16-BIT ADCs DIFFERENTIAL DRIVER USING THE AD8021 IN ACTIVE FILTERS DRIVING CAPACITIVE LOADS OUTLINE DIMENSIONS ORDERING GUIDE
AD8021 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS LOGIC AD8021 1 8 REFERENCE DISABLE –IN 2 7 +VS +IN 3 6 VOUT –VS 4 5 CCOMP
01888-003 Figure 4. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 LOGIC REFERENCE Reference for Pin 81 Voltage Level. Connect to logic low supply. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply Voltage. 5 CCOMP Compensation Capacitor. Tie to −VS. (See the Applications section for value.) 6 VOUT Output. 7 +VS Positive Supply Voltage. 8 DISABLE Disable, Active Low. 1 When Pin 8 (DISABLE) is higher than Pin 1 (LOGIC REFERENCE) by approximately 2 V or more, the part is enabled. When Pin 8 is brought down to within about 1.5 V of Pin 1, the part is disabled. (See the Specifications tables for exact disable and enable voltage levels.) If the disable feature is not going to be used, Pin 8 can be tied to +VS or a logic high source, and Pin 1 can be tied to ground or logic low. Alternatively, if Pin 1 and Pin 8 are not connected, the part is in an enabled state. Rev. F | Page 8 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS USING THE DISABLE FEATURE THEORY OF OPERATION PCB LAYOUT CONSIDERATIONS DRIVING 16-BIT ADCs DIFFERENTIAL DRIVER USING THE AD8021 IN ACTIVE FILTERS DRIVING CAPACITIVE LOADS OUTLINE DIMENSIONS ORDERING GUIDE
