Datasheet LTC2489 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | 16-Bit 2-/4-Channel ∆Σ ADC with Easy Drive Input Current Cancellation and I2C Interface |
| Pages / Page | 26 / 4 — analog inpuT anD reFerence The. denotes the specifications which apply … |
| File Format / Size | PDF / 387 Kb |
| Document Language | English |
analog inpuT anD reFerence The. denotes the specifications which apply over the full operating
Model Line for this Datasheet
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LTC2489
analog inpuT anD reFerence The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I + DC_LEAK(IN ) IN+ DC Leakage Current Sleep Mode, IN+ = GND l –10 1 10 nA I – DC_LEAK(IN ) IN– DC Leakage Current Sleep Mode, IN– = GND l –10 1 10 nA I + DC_LEAK(REF ) REF+ DC Leakage Current Sleep Mode, REF+ = VCC l –100 1 100 nA I – DC_LEAK(REF ) REF– DC Leakage Current Sleep Mode, REF– = GND l –100 1 100 nA tOPEN MUX Break-Before-Make 50 ns QIRR MUX Off Isolation VIN = 2VP-P DC to 1.8MHz 120 dB
i2c inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l 0.7VCC V VIL Low Level Input Voltage l 0.3VCC V VIHA High Level Input Voltage for Address Pins CA0, CA1 and Pin fO l 0.95VCC V VILA Low Level Input Voltage for Address Pins CA0, CA1 l 0.05VCC V RINH Resistance from CA0, CA1 to VCC to Set Chip Address l 10 kW Bit to 1 RINL Resistance from CA0, CA1 to GND to Set Chip Address l 10 kW Bit to 0 RINF Resistance from CA0, CA1 to GND or VCC to Set Chip Address l 2 MW Bit to Float II Digital Input Current l –10 10 µA VHYS Hysteresis of Schmidt Trigger Inputs (Note 5) l 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA l 0.4 V tOF Output Fall Time VIH(MIN) to VIL(MAX) Bus Load CB 10pF to l 20 + 0.1CB 250 ns 400pF (Note 14) IIN Input Leakage 0.1VCC ≤ VIN ≤ VCC l 1 µA CCAX External Capacitative Load on Chip Address Pins (CA0, CA1) for l 10 pF Valid Float
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 2.7 5.5 V ICC Supply Current Conversion Current (Note 11) l 160 275 µA Sleep Mode (Note 11) l 1 2 µA 2489fb 4 For more information www.linear.com/LTC2489 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Analog Input and Reference I2C Inputs and Digital Outputs Power Requirements Digital Inputs and Digital Outputs I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts
analog inpuT anD reFerence The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I + DC_LEAK(IN ) IN+ DC Leakage Current Sleep Mode, IN+ = GND l –10 1 10 nA I – DC_LEAK(IN ) IN– DC Leakage Current Sleep Mode, IN– = GND l –10 1 10 nA I + DC_LEAK(REF ) REF+ DC Leakage Current Sleep Mode, REF+ = VCC l –100 1 100 nA I – DC_LEAK(REF ) REF– DC Leakage Current Sleep Mode, REF– = GND l –100 1 100 nA tOPEN MUX Break-Before-Make 50 ns QIRR MUX Off Isolation VIN = 2VP-P DC to 1.8MHz 120 dB
i2c inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l 0.7VCC V VIL Low Level Input Voltage l 0.3VCC V VIHA High Level Input Voltage for Address Pins CA0, CA1 and Pin fO l 0.95VCC V VILA Low Level Input Voltage for Address Pins CA0, CA1 l 0.05VCC V RINH Resistance from CA0, CA1 to VCC to Set Chip Address l 10 kW Bit to 1 RINL Resistance from CA0, CA1 to GND to Set Chip Address l 10 kW Bit to 0 RINF Resistance from CA0, CA1 to GND or VCC to Set Chip Address l 2 MW Bit to Float II Digital Input Current l –10 10 µA VHYS Hysteresis of Schmidt Trigger Inputs (Note 5) l 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA l 0.4 V tOF Output Fall Time VIH(MIN) to VIL(MAX) Bus Load CB 10pF to l 20 + 0.1CB 250 ns 400pF (Note 14) IIN Input Leakage 0.1VCC ≤ VIN ≤ VCC l 1 µA CCAX External Capacitative Load on Chip Address Pins (CA0, CA1) for l 10 pF Valid Float
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 2.7 5.5 V ICC Supply Current Conversion Current (Note 11) l 160 275 µA Sleep Mode (Note 11) l 1 2 µA 2489fb 4 For more information www.linear.com/LTC2489 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Analog Input and Reference I2C Inputs and Digital Outputs Power Requirements Digital Inputs and Digital Outputs I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts
