Datasheet LTC1380, LTC1393 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | Single-Ended 8-Channel/ Differential 4-Channel Analog Multiplexer with SMBus Interface |
| Pages / Page | 12 / 6 — PIN FUNCTIONS. S0 to S7/S0. to S3. (Pin 1 to Pin 8):. A1, AO (Pin 12, Pin … |
| Revision | LTC1380/LTC1393: Single-Ended 8-Channel/ Differential 4-Channel Analog Multiplexer with SMBus Interface Data Sheet |
| File Format / Size | PDF / 246 Kb |
| Document Language | English |
PIN FUNCTIONS. S0 to S7/S0. to S3. (Pin 1 to Pin 8):. A1, AO (Pin 12, Pin 13):. O/DO (Pin 9):. SDA (Pin 14):. EE/DO (Pin 10):
Model Line for this Datasheet
Text Version of Document
LTC1380/LTC1393
U U U PIN FUNCTIONS S0 to S7/S0
±
to S3
±
(Pin 1 to Pin 8):
Single-Ended Analog
A1, AO (Pin 12, Pin 13):
Address Selection Pins. Tie these Multiplexer Inputs (S0 to S7) for the LTC1380. Differential two pins to either VCC or GND to select one of four possible Analog Multiplexer Inputs (S0± to S3±) for the LTC1393. addresses to which the LTC1380/LTC1393 will respond.
D + O/DO (Pin 9):
Analog Multiplexer Output for the LTC1380.
SDA (Pin 14):
SMBus Bidirectional Digital Input/Output Positive Differential Analog Multiplexer Output for the Pin. This pin has an open-drain output and requires a pull- LTC1393. up resistor or current source to the positive supply for normal operation. Data is shifted into and acknowledged
V – EE/DO (Pin 10):
Negative Supply Pin for the LTC1380. by the LTC1380/LTC1393 using this pin. Negative Differential Multiplexer Output for the LTC1393. For the LTC1380, VEE should be bypassed to GND with a
SCL (Pin 15):
SMBus Clock Input. SDA data is shifted in 0.1µF ceramic capacitor when operating from split sup- at rising edges of this clock during data transfer. plies or connected to GND for single supply operation.
VCC (Pin 16):
Positive Supply Pin. This pin should be
GND (Pin 11):
Ground Pin. bypassed to GND with a 0.1µF ceramic capacitor.
W BLOCK DIAGRA
ANALOG INPUTS ANALOG OUTPUT(S) MULTIPLEXER (LTC1380: S0 TO S7) (LTC1380: DO) SWITCHES (LTC1393: S0± TO S3±) (LTC1393: D ± O ) 4-BIT LATCH AND DECODER HOLD SHIFT REGISTER A0 ADDRESS COMPARATOR A1 SDA SMBus STATE MACHINE STOP 1380/93 BD SCL 6
U U U PIN FUNCTIONS S0 to S7/S0
±
to S3
±
(Pin 1 to Pin 8):
Single-Ended Analog
A1, AO (Pin 12, Pin 13):
Address Selection Pins. Tie these Multiplexer Inputs (S0 to S7) for the LTC1380. Differential two pins to either VCC or GND to select one of four possible Analog Multiplexer Inputs (S0± to S3±) for the LTC1393. addresses to which the LTC1380/LTC1393 will respond.
D + O/DO (Pin 9):
Analog Multiplexer Output for the LTC1380.
SDA (Pin 14):
SMBus Bidirectional Digital Input/Output Positive Differential Analog Multiplexer Output for the Pin. This pin has an open-drain output and requires a pull- LTC1393. up resistor or current source to the positive supply for normal operation. Data is shifted into and acknowledged
V – EE/DO (Pin 10):
Negative Supply Pin for the LTC1380. by the LTC1380/LTC1393 using this pin. Negative Differential Multiplexer Output for the LTC1393. For the LTC1380, VEE should be bypassed to GND with a
SCL (Pin 15):
SMBus Clock Input. SDA data is shifted in 0.1µF ceramic capacitor when operating from split sup- at rising edges of this clock during data transfer. plies or connected to GND for single supply operation.
VCC (Pin 16):
Positive Supply Pin. This pin should be
GND (Pin 11):
Ground Pin. bypassed to GND with a 0.1µF ceramic capacitor.
W BLOCK DIAGRA
ANALOG INPUTS ANALOG OUTPUT(S) MULTIPLEXER (LTC1380: S0 TO S7) (LTC1380: DO) SWITCHES (LTC1393: S0± TO S3±) (LTC1393: D ± O ) 4-BIT LATCH AND DECODER HOLD SHIFT REGISTER A0 ADDRESS COMPARATOR A1 SDA SMBus STATE MACHINE STOP 1380/93 BD SCL 6
