Datasheet LTC3458 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 1.4A, 1.5MHz Synchronous Step-Up DC/DC Converter with Output Disconnect |
| Pages / Page | 16 / 10 — APPLICATIO S I FOR ATIO. Manual Control. Figure 1 |
| File Format / Size | PDF / 320 Kb |
| Document Language | English |
APPLICATIO S I FOR ATIO. Manual Control. Figure 1
Model Line for this Datasheet
Text Version of Document
LTC3458
U U W U APPLICATIO S I FOR ATIO
transition occurs using a single resistor. During Burst C V OUT OUT Mode operation, the oscillator is shut down, since the on CBURST = • , 10 000 time is determined by the time it takes the inductor current to reach a fixed peak current, and the off time is deter- where CBURST(MIN) and COUT are in μF. mined by the time it takes for the inductor current to return Note: the BURST pin only sources current based on to zero. current delivered to VOUT through the P-channel MOSFET. In Burst Mode operation, the IC delivers energy to the If current in the inductor is allowed to go negative (this can output until it is regulated and then goes into a sleep mode occur at very light loads and high step-up ratios), the burst where the outputs are off and the IC is consuming only threshold may become inaccurate, preventing the IC from 15μA of quiescent current. In this mode the output ripple entering Burst Mode operation. For RBURST values greater voltage has a variable frequency component with load than 200k, a larger than recommended inductor value may current and will be typically 2% peak-to-peak. This maxi- be needed to ensure positive inductor current and auto- mizes efficiency at very light loads by minimizing switch- matic Burst Mode operation. ing and quiescent losses. Burst Mode ripple can be re- In the event that a sudden load transient causes the voltage duced slightly by using more output capacitance (22μF or level on FB to drop by more than 4% from the regulation greater). This capacitor does not need to be a low ESR type value, an internal pull-up is applied to BURST, forcing the if low ESR ceramics are also used. Another method of part quickly out of Burst Mode operation. For optimum reducing Burst Mode ripple is to place a small feed- transient response when going between Burst Mode op- forward capacitor across the upper resistor in the VOUT eration and PWM mode, Burst can be controlled manually feedback divider network. by the host. This way PWM mode can be commanded During Burst Mode operation, COMP is disconnected before the load step occurs, minimizing output voltage from the error amplifier in an effort to hold the voltage on drop. Note that Burst Mode operation is inhibited during the external compensation network where it was before start-up and soft-start. entering Burst Mode operation. To minimize the effects of leakage current and stray resistance, voltage clamps limit
Manual Control
the minimum and maximum voltage on COMP during For applications requiring fixed frequency operation at all Burst Mode operation. This minimizes the transient expe- load currents, connect the BURST pin to VOUT through a rienced when a heavy load is suddenly applied to the 50kΩ resistor. To force Burst Mode operation, ground the converter after being in Burst Mode operation for an BURST pin. extended period of time. For applications where a large load step can be anticipated, For automatic operation, an RC network should be con- the circuit below can be used to reduce the voltage nected from BURST to ground. The value of the resistor transient on VOUT. Automatic operation is achieved when will control the average load current (IBURST) at which the external PMOS is off and fixed frequency operation is Burst Mode operation will be entered and exited (there is commanded when the external PMOS is on. In shutdown, hysteresis to prevent oscillation between modes). The the PMOS should be off. equation given for the capacitor on BURST is for the V minimum value, to prevent ripple on the BURST pin from IN HIGH: AUTO MODE causing the part to oscillate in and out of Burst Mode PMOS LOW: FIXED FREQUENCY operation at the current where the mode transition occurs. BURST 0.01 133k μF RBURST = 10 IBURST 3458 FO2 where RBURST is in kΩ and IBURST is in amps.
Figure 1
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U U W U APPLICATIO S I FOR ATIO
transition occurs using a single resistor. During Burst C V OUT OUT Mode operation, the oscillator is shut down, since the on CBURST = • , 10 000 time is determined by the time it takes the inductor current to reach a fixed peak current, and the off time is deter- where CBURST(MIN) and COUT are in μF. mined by the time it takes for the inductor current to return Note: the BURST pin only sources current based on to zero. current delivered to VOUT through the P-channel MOSFET. In Burst Mode operation, the IC delivers energy to the If current in the inductor is allowed to go negative (this can output until it is regulated and then goes into a sleep mode occur at very light loads and high step-up ratios), the burst where the outputs are off and the IC is consuming only threshold may become inaccurate, preventing the IC from 15μA of quiescent current. In this mode the output ripple entering Burst Mode operation. For RBURST values greater voltage has a variable frequency component with load than 200k, a larger than recommended inductor value may current and will be typically 2% peak-to-peak. This maxi- be needed to ensure positive inductor current and auto- mizes efficiency at very light loads by minimizing switch- matic Burst Mode operation. ing and quiescent losses. Burst Mode ripple can be re- In the event that a sudden load transient causes the voltage duced slightly by using more output capacitance (22μF or level on FB to drop by more than 4% from the regulation greater). This capacitor does not need to be a low ESR type value, an internal pull-up is applied to BURST, forcing the if low ESR ceramics are also used. Another method of part quickly out of Burst Mode operation. For optimum reducing Burst Mode ripple is to place a small feed- transient response when going between Burst Mode op- forward capacitor across the upper resistor in the VOUT eration and PWM mode, Burst can be controlled manually feedback divider network. by the host. This way PWM mode can be commanded During Burst Mode operation, COMP is disconnected before the load step occurs, minimizing output voltage from the error amplifier in an effort to hold the voltage on drop. Note that Burst Mode operation is inhibited during the external compensation network where it was before start-up and soft-start. entering Burst Mode operation. To minimize the effects of leakage current and stray resistance, voltage clamps limit
Manual Control
the minimum and maximum voltage on COMP during For applications requiring fixed frequency operation at all Burst Mode operation. This minimizes the transient expe- load currents, connect the BURST pin to VOUT through a rienced when a heavy load is suddenly applied to the 50kΩ resistor. To force Burst Mode operation, ground the converter after being in Burst Mode operation for an BURST pin. extended period of time. For applications where a large load step can be anticipated, For automatic operation, an RC network should be con- the circuit below can be used to reduce the voltage nected from BURST to ground. The value of the resistor transient on VOUT. Automatic operation is achieved when will control the average load current (IBURST) at which the external PMOS is off and fixed frequency operation is Burst Mode operation will be entered and exited (there is commanded when the external PMOS is on. In shutdown, hysteresis to prevent oscillation between modes). The the PMOS should be off. equation given for the capacitor on BURST is for the V minimum value, to prevent ripple on the BURST pin from IN HIGH: AUTO MODE causing the part to oscillate in and out of Burst Mode PMOS LOW: FIXED FREQUENCY operation at the current where the mode transition occurs. BURST 0.01 133k μF RBURST = 10 IBURST 3458 FO2 where RBURST is in kΩ and IBURST is in amps.
Figure 1
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