Datasheet ATmega164A - Summary (Microchip)

ManufacturerMicrochip
Description8-bit AVR Microcontrollers ATmega164A
Pages / Page22 / 1 — 8-bit AVR Microcontrollers. ATmega164A. DATASHEET SUMMARY. Introduction. …
Revision12-10-2016
File Format / SizePDF / 519 Kb
Document LanguageEnglish

8-bit AVR Microcontrollers. ATmega164A. DATASHEET SUMMARY. Introduction. Feature

Datasheet ATmega164A - Summary Microchip, Revision: 12-10-2016

Model Line for this Datasheet

ATmega164A

Text Version of Document

8-bit AVR Microcontrollers ATmega164A DATASHEET SUMMARY Introduction
The Atmel® ATmega164A is a low-power CMOS 8-bit microcontroller based on the AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega164A achieves throughputs close to 1MIPS per MHz. This empowers system designer to optimize the device for power consumption versus processing speed.
Feature
High Performance, Low Power Atmel®AVR® 8-Bit Microcontroller Family • Advanced RISC Architecture – 131 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 20 MIPS Throughput at 20MHz – On-chip 2-cycle Multiplier • High Endurance Non-volatile Memory Segments – 16KBytes of In-System Self-Programmable Flash Program Memory – 512Bytes EEPROM – 1KBytes Internal SRAM – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM – Data Retention: 20 Years at 85°C/100 Years at 25°C(1) – Optional Boot Code Section with Independent Lock Bits • In-System Programming by On-chip Boot Program • True Read-While-Write Operation – Programming Lock for Software Security • Atmel QTouch® Library Support – Capacitive Touch Buttons, Sliders and Wheels – QTouch and QMatrix acquisition – Up to 64 Sense Channels Atmel-42712C-ATmega164A_Datasheet_Summary-10/2016 Document Outline Introduction Feature Table of Contents 1. Description 2. Configuration Summary 3. Ordering Information 4. Block Diagram 5. Pin Configurations 5.1. Pinout 5.1.1. PDIP 5.1.2. TQFN and QFN 5.1.3. DRQFN 5.1.4. VFBGA 5.2. Pin Descriptions 5.2.1. VCC 5.2.2. GND 5.2.3. Port A (PA[7:0]) 5.2.4. Port B (PB[7:0]) 5.2.5. Port C (PC[7:0]) 5.2.6. Port D (PD[7:0]) 5.2.7. RESET 5.2.8. XTAL1 5.2.9. XTAL2 5.2.10. AVCC 5.2.11. AREF 6. I/O Multiplexing 7. General Information 7.1. Resources 7.2. Data Retention 7.3. About Code Examples 7.4. Capacitive Touch Sensing 7.4.1. QTouch Library 8. Packaging Information 8.1. 40-pin PDIP 8.2. 44-pin TQFP 8.3. 44-pin VQFN 8.4. 44-pin QFN 8.5. 49-pin VFBGA