Datasheet ADL5565 (Analog Devices) - 4

ManufacturerAnalog Devices
Description6 GHz Ultrahigh Dynamic Range Differential Amplifier
Pages / Page29 / 4 — Data Sheet. ADL5565. SPECIFICATIONS 3.3 V SPECIFICATIONS. Table 1. …
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Data Sheet. ADL5565. SPECIFICATIONS 3.3 V SPECIFICATIONS. Table 1. Parameter. Test Conditions/Comments. Min. Typ. Max Unit

Data Sheet ADL5565 SPECIFICATIONS 3.3 V SPECIFICATIONS Table 1 Parameter Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADL5565 SPECIFICATIONS 3.3 V SPECIFICATIONS
VS = 3.3 V, VCM = 1.65 V, RL = 200 Ω differential, AV = 6 dB, CL = 1 pF differential, f = 100 MHz, TA = 25°C; parameters specified ac-coupled differential input and differential output, unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth AV = 6 dB, VOUT ≤ 1.0 V p-p 6750 MHz AV = 12 dB, VOUT ≤ 1.0 V p-p 6500 MHz AV = 15.5 dB, VOUT ≤ 1.0 V p-p 6250 MHz Bandwidth for 0.1 dB Flatness VOUT ≤ 1.0 V p-p 1000 MHz Gain Accuracy ±1 dB Gain Supply Sensitivity VS ± 5% 1.9 mdB/V Gain Temperature Sensitivity −40°C to +85°C 0.35 mdB/°C Slew Rate Rise, AV = 15.5 dB, RL = 200 Ω, 11 V/ns VOUT = 2 V step Fal , AV = 15.5 dB, RL = 200 Ω, 11 V/ns VOUT = 2 V step Settling Time 2 V step to 1% 2 ns Overdrive Recovery Time VIN = 4 V to 0 V step, VOUT ≤ ±10 mV <3 ns Reverse Isolation (S12) 70 dB INPUT/OUTPUT CHARACTERISTICS Input Common-Mode Range AV = 6 dB, 12 dB, and 15.5 dB 1.2 to 2 V Output Common-Mode Range 1.4 to 1.8 V Maximum Output Voltage Swing 1 dB compressed 4 V p-p Output Common-Mode Offset Referenced to VCC/2 −100 +20 mV Output Common-Mode Drift −40°C to +85°C 0.34 mV/°C Output Differential Offset Voltage −20 +20 mV CMRR 60 dB Output Differential Offset Drift −40°C to +85°C 1.5 mV/°C Input Bias Current ±5 µA Input Resistance (Differential) AV = 6 dB 200 Ω AV = 12 dB 100 Ω AV = 15.5 dB 67 Ω Input Resistance (Single-Ended) AV = 5.6 dB 158 Ω AV = 11.1 dB 96 Ω AV = 14.1 dB 74 Ω Input Capacitance (Single-Ended) 0.3 pF Output Resistance (Differential) 10 Ω POWER INTERFACE Supply Voltage 2.8 3.3 5.2 V ENBL Threshold Device disabled, ENBL low 0.5 V Device enabled, ENBL high 1.5 V ENBL Input Bias Current ENBL high 500 nA ENBL low −165 µA Quiescent Current ENBL high 70 mA ENBL low 5 mA Rev. E | Page 3 of 28 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications 3.3 V Specifications 5 V Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Circuit Description Basic Structure Applications information Basic Connections Input and Output Interfacing Single-Ended Input to Differential Output Gain Adjustment and Interfacing ADC Interfacing Layout Considerations Soldering Information and Recommended PCB Land Pattern Evaluation Board Outline Dimensions Ordering Guide
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