Datasheet ADA4939-1/ADA4939-2 (Analog Devices)

ManufacturerAnalog Devices
DescriptionUltralow Distortion Differential ADC Driver
Pages / Page24 / 1 — Ultralow Distortion,. Differential ADC Driver. Data Sheet. ADA4939-1/. …
RevisionA
File Format / SizePDF / 597 Kb
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Ultralow Distortion,. Differential ADC Driver. Data Sheet. ADA4939-1/. ADA4939-2. FEATURES. FUNCTIONAL BLOCK DIAGRAMS

Datasheet ADA4939-1/ADA4939-2 Analog Devices, Revision: A

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Ultralow Distortion, Differential ADC Driver Data Sheet ADA4939-1/ ADA4939-2 FEATURES FUNCTIONAL BLOCK DIAGRAMS Extremely low harmonic distortion ADA4939-1 −102 dBc HD2 at 10 MHz S S S S –V –V –V –V −83 dBc HD2 at 70 MHz 61 51 41 31 −77 dBc HD2 at 100 MHz −101 dBc HD3 at 10 MHz –FB 1 12 PD +IN 2 11 −97 dBc HD3 at 70 MHz –OUT –IN 3 10 +OUT −91 dBc HD3 at 100 MHz +FB 4 9 V Low input voltage noise: 2.3 nV/√Hz OCM High speed
1
5 6 7 8
-00
−3 dB bandwidth of 1.4 GHz, G = 2 S S S S V V V V
752 7
+ + + +
0
Slew rate: 6800 V/μs, 25% to 75%
Figure 1. ADA4939-1
Fast overdrive recovery of <1 ns 1 1 1 1 1 T ±0.5 mV typical offset voltage B S S N 1 U I F V V D + P O– Externally adjustable gain 4 3 2 1 0 2 2 2 2 9 2 1 Stable for differential gains ≥2 –IN1 1 18 +OUT1 Differential-to-differential or single-ended-to-differential +FB1 2 17 VOCM1 operation +VS1 3 16 –VS2 ADA4939-2 Adjustable output common-mode voltage +VS1 15 –V 4 S2 –FB2 5 14 Single-supply operation: 3.3 V to 5 V PD2 +IN2 6 13 –OUT2 APPLICATIONS 7 8 9 0 1 1 1 21 ADC drivers 2 2 2 2 2 2 NI B S S M T
02 0
Single-ended-to-differential converters F V V C U + + + O
29-
V O +
074
IF and baseband gain blocks
Figure 2. ADA4939-2
Differential buffers Line drivers
The ADA4939-1 (single) is available in a 3 mm × 3 mm, 16-lead LFCSP, and the ADA4939-2 (dual) is available in a 4 mm × 4 mm,
GENERAL DESCRIPTION
24-lead LFCSP. The pinouts are optimized to facilitate printed The ADA4939-1/ADA4939-2 are low noise, ultralow distortion, circuit board (PCB) layout and minimize distortion. The high speed differential amplifiers. They are an ideal choice for ADA4939-1/ADA4939-2 are specified to operate over the driving high performance ADCs with resolutions up to 16 bits −40°C to +105°C temperature range; both operate on supplies from dc to 100 MHz. The output common-mode voltage is user between 3.3 V and 5 V. adjustable by means of an internal common-mode feedback loop,
–60
allowing the ADA4939-1/ADA4939-2 output to match the input
VOUT, dm = 2V p-p –65
of the ADC. The internal feedback loop also provides exceptional
HD2 HD3
output balance as well as suppression of even-order harmonic
–70 Bc) d
distortion products.
( –75 N IO
With the ADA4939-1/ADA4939-2, differential gain configurations
–80 RT O
are easily realized with a simple external feedback network of four
T –85 S
resistors that determine the closed-loop gain of the amplifier.
C DI –90 NI
The ADA4939-1/ADA4939-2 are fabricated using Analog Devices,
O M –95
Inc., proprietary silicon-germanium (SiGe), complementary bipolar
HAR –100
process, enabling them to achieve very low levels of distortion with
–105
an input voltage noise of only 2.3 nV/√Hz. The low dc offset and
–110
excellent dynamic performance of the ADA4939-1/ADA4939-2
1 10 100
21 0 9- make them well suited for a wide variety of data acquisition and
FREQUENCY (MHz)
42 07 signal processing applications. Figure 3. Harmonic Distortion vs. Frequency
Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2008–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 5 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance 3.3 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OPERATIONAL DESCRIPTION DEFINITION OF TERMS Differential Voltage Common-Mode Voltage Balance THEORY OF OPERATION ANALYZING AN APPLICATION CIRCUIT SETTING THE CLOSED-LOOP GAIN STABLE FOR GAINS ≥2 ESTIMATING THE OUTPUT NOISE VOLTAGE IMPACT OF MISMATCHES IN THE FEEDBACK NETWORKS CALCULATING THE INPUT IMPEDANCE FOR AN APPLICATION CIRCUIT Terminating a Single-Ended Input INPUT COMMON-MODE VOLTAGE RANGE INPUT AND OUTPUT CAPACITIVE AC COUPLING MINIMUM RG VALUE OF 50 Ω SETTING THE OUTPUT COMMON-MODE VOLTAGE LAYOUT, GROUNDING, AND BYPASSING HIGH PERFORMANCE ADC DRIVING OUTLINE DIMENSIONS ORDERING GUIDE
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