Datasheet LTC6902 (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionMultiphase Oscillator with Spread Spectrum Frequency Modulation
Pages / Page16 / 10 — THEORY OF OPERATIO. Spread Spectrum Frequency Modulation
File Format / SizePDF / 213 Kb
Document LanguageEnglish

THEORY OF OPERATIO. Spread Spectrum Frequency Modulation

THEORY OF OPERATIO Spread Spectrum Frequency Modulation

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LTC6902
U THEORY OF OPERATIO
by 90 degrees, OUT3 lags OUT2 by 90 degrees and OUT4 Referencing VMOD to VSET allows the ratio of RSET to lags OUT3 by 90 degrees. The signals are generated by RMOD to determine the amount of frequency spreading. flip-flops. The output frequency is the programmable Consider the case when RSET is equal to RMOD. Here, divider’s output further divided 4 (M = 4). when the (V+ – VMOD) voltage is at its minimum of 0V, I The multiphase mode is determined by the state of the PH MOD = 0A, IMASTER = ISET and the master oscillator is at its maximum frequency (f input (Pin 3). Tie the PH pin to GND or drive it below 0.5V MAX) which is the fOUT fre- quency set by the R to select the 2-phase mode. The PH pin may be floated or SET resistor. Furthermore, when the (V+ – V driven to midsupply to select the 3-phase mode. The MOD) voltage is at its maximum of 20% of (V+ – V 4-phase mode is selected by tying the PH pin to V+ or SET), IMOD = 0.2 • ISET, IMASTER = 0.8 • ISET and the master oscillator is at its minimum frequency (f driving it to within 0.4V of V+. MIN) which is 80% of the fOSC frequency set by the RSET The CMOS output drivers have an ON resistance that is resistor. The general formula for the amount of frequency typically less than 100Ω. In the ÷1 (high frequency) mode, spreading is below: the rise and fall times are typically 7ns with a 5V supply and 11ns with a 3V supply. These transition times maintain a R Frequency Spreading (in %) = 20 • SET clean square wave at 10MHz (20MHz at 5V supply). In the RMOD ÷10 and ÷100 modes, where the output frequency is much lower, slew rate control circuitry in the output driver in- where frequency spreading is defined as: creases the rise/fall times to typically 14ns for a 5V supply f – f and 19ns for a 3V supply. The reduced slew rate lowers EMI Frequency Spreading (in %) = 100 • MAX MIN (electromagnetic interference) and supply bounce. fMAX The design procedure is to first choose the R
Spread Spectrum Frequency Modulation
SET resistor value to set fMAX (fOUT) and then choose the RMOD resistor The LTC6902 provides the additional feature of spread value to set the amount of frequency spreading desired. spectrum frequency modulation (SSFM). The oscillator’s Note that the frequency is always modulated to a lower frequency is modulated by a pseudorandom noise (PRN) value. This is often referred to as a down spread signal. signal to spread the oscillator’s energy over a wide fre- To disable the SSFM, connect the MOD pin to ground. quency band. This spreading decreases the peak electro- Grounding the MOD pin disables the modulation and shuts magnetic radiation levels and improves electromagnetic down the modulation circuitry. While leaving the MOD pin compatibility (EMC) performance. open, RMOD = ∞, gives a frequency spreading of 0%, this The amount of frequency spreading is determined by the is not a good method of disabling the modulation. The external resistor RMOD and the voltage between the V+ and open pin is susceptible to external noise coupling that can MOD pins (V+ – VMOD). Unlike the stationary SET pin affect the output frequency accuracy. Grounding the MOD voltage (VSET), the MOD pin voltage (VMOD) is a dynamic pin is the best way to disable the SSFM. signal generated by a multiplying digital to analog con- As stated previously the modulating waveform is a pseu- verter (MDAC) referenced to VSET. Referencing to VSET dorandom noise-like waveform. The pseudorandom signal negates errors due to variations of the VSET voltage and is generated by a linear feedback shift register that is 9 bits locks the two voltages together. The VMOD voltage is the long. The pseudorandom sequence will repeat every 512 VSET voltage scaled by one fifth and multiplied by the (29) shift register clock cycles. The bottom seven bits of the digital code sent to the MDAC from the pseudorandom shift register are sent in parallel to the MDAC which pro- binary sequence (PRBS) generator. VMOD varies in a duces the V pseudorandom noise-like manner. The (V+ – V MOD voltage. Being a digitally generated signal, MOD) volt- the output is not a perfectly smooth waveform but consists age is 0V minimum and maximally one fifth (20%) of of 128 (27) discrete steps that change every shift register (V+ – VSET). 6902f 10
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