Datasheet LTC1693 (Linear Technology) - 10
| Manufacturer | Linear Technology |
| Description | High Speed Single/Dual N-Channel MOSFET Drivers |
| Pages / Page | 20 / 10 — APPLICATIONS INFORMATION. UVLO and Thermal Shutdown. Figure 4. Bypassing … |
| Revision | A |
| File Format / Size | PDF / 270 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. UVLO and Thermal Shutdown. Figure 4. Bypassing and Grounding. Input Voltage Range
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LTC1693
U U W U APPLICATIONS INFORMATION
corresponding to MOSFET’s VGS value (VCC in this case) VCC can be readily obtained from the manafacturer’s QGS vs VGS curves: LTC1693 Load Capacitive Power (MOS) = (VCC)(QG)(f) INPUT SIGNAL IN Transition state power losses are due to both AC currents R1 GOING BEL0W required to charge and discharge the drivers’ internal GND PIN POTENTIAL nodal capacitances and cross-conduction currents in the D1 PARASITIC internal gates. SUBSTRATE DIODE 1693 F04
UVLO and Thermal Shutdown
GND The LTC1693’s UVLO detector disables the input buffer and pulls the output pin to ground if V
Figure 4
CC < 4V. The output remains off from VCC = 1V to VCC = 4V. This ensures that
Bypassing and Grounding
during start-up or improper supply voltage values, the LTC1693 will keep the output power MOSFET off. LTC1693 requires proper VCC bypassing and grounding due to its high speed switching (ns) and large AC currents (A). The LTC1693 also has a thermal detector that similarly Careless component placement and PCB trace routing may disables the input buffer and grounds the output pin if cause excessive ringing and under/overshoot. junction temperature exceeds 145°C. The thermal shut- down circuit has 20°C of hysteresis. This thermal limit To obtain the optimum performance from the LTC1693: helps to shut down the system should a fault condition A. Mount the bypass capacitors as close as possible to the occur. VCC and GND pins. The leads should be shortened as
Input Voltage Range
much as possible to reduce lead inductance. It is recommended to have a 0.1µF ceramic in parallel with LTC1693’s input pin is a high impedance node and essen- a low ESR 4.7µF bypass capacitor. tially draws neligible input current. This simplifies the input drive circuitry required for the input. For high voltage switching in an inductive environment, ensure that the bypass capacitors’ V The LTC1693 typically has 1.2V of hysteresis between its MAX ratings are high enough to prevent breakdown. This is especially low and high input thresholds. This increases the driver’s important for floating driver applications. robustness against any ground bounce noises. However, care should still be taken to keep this pin from any noise B. Use a low inductance, low impedance ground plane to pickup, especially in high frequency switching reduce any ground drop and stray capacitance. Re- applications. member that the LTC1693 switches 1.5A peak currents and any significant ground drop will degrade signal In applications where the input signal swings below the integrity. GND pin potential, the input pin voltage must be clamped to prevent the LTC1693’s parastic substrate diode from C. Plan the ground routing carefully. Know where the large turning on. This can be accomplished by connecting a load switching current is coming from and going to. series current limiting resistor R1 and a shunting Schottky Maintain separate ground return paths for the input pin diode D1 to the input pin (Figure 4). R1 ranges from 100Ω and output pin. Terminate these two ground traces only to 470Ω while D1 can be a BAT54 or 1N5818/9. at the GND pin of the driver (STAR network). D. Keep the copper trace between the driver output pin and the load short and wide. 10
U U W U APPLICATIONS INFORMATION
corresponding to MOSFET’s VGS value (VCC in this case) VCC can be readily obtained from the manafacturer’s QGS vs VGS curves: LTC1693 Load Capacitive Power (MOS) = (VCC)(QG)(f) INPUT SIGNAL IN Transition state power losses are due to both AC currents R1 GOING BEL0W required to charge and discharge the drivers’ internal GND PIN POTENTIAL nodal capacitances and cross-conduction currents in the D1 PARASITIC internal gates. SUBSTRATE DIODE 1693 F04
UVLO and Thermal Shutdown
GND The LTC1693’s UVLO detector disables the input buffer and pulls the output pin to ground if V
Figure 4
CC < 4V. The output remains off from VCC = 1V to VCC = 4V. This ensures that
Bypassing and Grounding
during start-up or improper supply voltage values, the LTC1693 will keep the output power MOSFET off. LTC1693 requires proper VCC bypassing and grounding due to its high speed switching (ns) and large AC currents (A). The LTC1693 also has a thermal detector that similarly Careless component placement and PCB trace routing may disables the input buffer and grounds the output pin if cause excessive ringing and under/overshoot. junction temperature exceeds 145°C. The thermal shut- down circuit has 20°C of hysteresis. This thermal limit To obtain the optimum performance from the LTC1693: helps to shut down the system should a fault condition A. Mount the bypass capacitors as close as possible to the occur. VCC and GND pins. The leads should be shortened as
Input Voltage Range
much as possible to reduce lead inductance. It is recommended to have a 0.1µF ceramic in parallel with LTC1693’s input pin is a high impedance node and essen- a low ESR 4.7µF bypass capacitor. tially draws neligible input current. This simplifies the input drive circuitry required for the input. For high voltage switching in an inductive environment, ensure that the bypass capacitors’ V The LTC1693 typically has 1.2V of hysteresis between its MAX ratings are high enough to prevent breakdown. This is especially low and high input thresholds. This increases the driver’s important for floating driver applications. robustness against any ground bounce noises. However, care should still be taken to keep this pin from any noise B. Use a low inductance, low impedance ground plane to pickup, especially in high frequency switching reduce any ground drop and stray capacitance. Re- applications. member that the LTC1693 switches 1.5A peak currents and any significant ground drop will degrade signal In applications where the input signal swings below the integrity. GND pin potential, the input pin voltage must be clamped to prevent the LTC1693’s parastic substrate diode from C. Plan the ground routing carefully. Know where the large turning on. This can be accomplished by connecting a load switching current is coming from and going to. series current limiting resistor R1 and a shunting Schottky Maintain separate ground return paths for the input pin diode D1 to the input pin (Figure 4). R1 ranges from 100Ω and output pin. Terminate these two ground traces only to 470Ω while D1 can be a BAT54 or 1N5818/9. at the GND pin of the driver (STAR network). D. Keep the copper trace between the driver output pin and the load short and wide. 10
