Datasheet ADP5091, ADP5092 (Analog Devices) - 4

ADP5091/ADP5092 Data Sheet SPECIFICATIONS
Voltage input (VIN) = 1.2 V, VSYS = VBAT = 3 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted. External components include the following: inductance (L) = 22 µH, input capacitance (CIN) = 4.7 µF, and CSYS = 4.7 µF.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
QUIESCENT CURRENT

Operating Quiescent Current of SYS Pin IQ_SYS REG_D0 = low, REG_D1 = low 510 1000 nA (VIN > VCBP ≥ VMINOP) REG_D0 = high, REG_D1 = low 650 1150 nA REG_D0 = low, REG_D1 = high 750 1290 nA REG_D0 = high, REG_D1 = high 760 1300 nA Sleeping Quiescent Current of SYS Pin IIQ_SLEEP_SYS REG_D0 = low, REG_D1 = low 390 880 nA (VCBP < VMINOP) COLD START CIRCUIT Minimum Input Voltage for Cold Start VIN_COLD VSYS = 0 V, 0°C < TA < 85°C 380 500 mV Minimum Input Power for Cold Start PIN_COLD 6 µW End of Cold Start Operation Threshold VSYS_TH 1.73 1.87 2.00 V Hysteresis VSYS_HYS 95 mV BOOST REGULATOR Input Voltage Operating Range VIN Cold start completed 0.08 3.3 V Input Power Operating Range PIN Cold start completed, VIN = 3 V 600 mW Start Charging BAT Threshold on SYS VSYS_CHG 2.00 2.19 2.35 V Start Charging BAT Hysteresis on SYS VSYS_CHG_HYS 150 mV Input Peak Current IIN_PEAK Factory trim, 1 bit, Option 0 200 250 mA Option 1 300 mA Low-Side Switch On Resistance RLS_DS_ON Pin to pin measurement 0.44 0.6 Ω High-Side Switch On Resistance RHS_DS_ON Pin to pin measurement 0.85 1.2 Ω SYS Switch On Resistance RSYS_DS_ON 0.32 0.70 Ω DIS_SW Voltage High VDIS_SW_HIGH 1 V Low VDIS_SW_LOW 0.5 V DIS_SW Delay tDIS_SW_DELAY 1 µs VIN CONTROL AND MINOP VIN Open Circuit Voltage Default Sampling Cycle tOCV_CYCLE Factory trim, 2 bit (4 sec, 8 sec, 16 sec, 16 sec 32 sec) Sampling Time tOCV_SAMPL 256 ms MINOP Bias Current IMINOP 1.58 2.00 2.45 µA MINOP Operation Voltage Threshold VMINOP_DSM 1.5 V of Dynamic MPPT Sensing Mode MPPT Bias Current of MPPT No IMPPT 1.7 2.0 2.3 µA Sensing Mode LLD (ADP5091 Only) Pull-Up Resistor 12 17 kΩ Pul -Down Resistor 12 17 kΩ High Voltage VLLD_IH VREG_OUT V Leakage Current at CBP Pin ICBP_LEAK 10 2000 pA Rev. A | Page 4 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS REGULATED OUTPUT SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION FAST COLD START-UP CIRCUIT (VSYS < VSYS_TH, VIN > VIN_COLD) MAIN BOOST REGULATOR (VBAT_TERM > VSYS > VSYS_TH) VIN OPEN CIRCUIT AND MPPT MINIMUM OPERATION THRESHOLD FUNCTION DISABLING BOOST REGULATED OUTPUT WORKING MODE REG_D0 AND REG_D1 REGULATED OUTPUT CONFIGURATION REG_GOOD (ADP5092 ONLY) ENERGY STORAGE CHARGE MANAGEMENT BACKUP STORAGE PATH BACKUP AND BAT SELECTION THRESHOLD BATTERY OVERCHARGING PROTECTION BATTERY DISCHARGING PROTECTION POWER GOOD (PGOOD) POWER PATH WORKING FLOW CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ENERGY HARVESTER SELECTION ENERGY STORAGE ELEMENT SELECTION INDUCTOR SELECTION CAPACITOR SELECTION Input Capacitor SYS Capacitor REG_OUT Capacitor CBP Capacitor LAYOUT AND ASSEMBLY CONSIDERATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE