Datasheet LTC3879 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Fast, Wide Operating Range No RSENSE Step-Down Controller |
| Pages / Page | 28 / 8 — PIN FUNCTIONS. TRACK/SS (Pin 1):. RUN (Pin 9):. PGOOD. (Pin 2):. VIN (Pin … |
| File Format / Size | PDF / 314 Kb |
| Document Language | English |
PIN FUNCTIONS. TRACK/SS (Pin 1):. RUN (Pin 9):. PGOOD. (Pin 2):. VIN (Pin 10):. VRNG (Pin 3):. INTVCC (Pin 11):. BG (Pin 12):
Model Line for this Datasheet
Text Version of Document
LTC3879
PIN FUNCTIONS TRACK/SS (Pin 1):
External Tracking and Soft-Start Input.
RUN (Pin 9):
Run Control Input. RUN below 1.5V disables The LTC3879 regulates VFB to the smaller of 0.6V or the switching by forcing TG and BG low. RUN less than 1.5V voltage on the TRACK/SS pin. An internal 1μA pull-up but greater than 0.7V enables all internal bias including current source is connected to this pin. A capacitor to the INTVCC output. RUN below 0.7V shuts down all bias ground at this pin sets the ramp time to the fi nal regulated and places the LTC3879 into micropower shutdown mode output voltage. Alternatively, a resistor divider on another of approximately 18μA. There is an internal 1.2μA pull-up voltage supply connected to this pin allows the output to current source for operation with an open-collector RUN track the other supply during start-up. signal.
PGOOD (Pin 2):
Power Good Output. This open-drain
VIN (Pin 10):
Main Input Supply. The supply voltage can logic output is pulled to ground when the output voltage is range from 4V to 38V. For increased noise immunity de- outside of a ±10% window around the regulation point. couple this pin to PGND with an RC fi lter.
VRNG (Pin 3):
VDS Sense Voltage Range Input. The maxi-
INTVCC (Pin 11):
Internal 5.3V Regulator Output. The mum allowed bottom MOSFET VDS sense voltage between driver and control circuits are powered from this voltage. SW and PGND is equal to (0.133)VRNG. The voltage applied Decouple this pin to PGND with a minimum of 1μF, 10V to VRNG can be any value between 0.2V and 2V. If VRNG is X5R or X7R ceramic capacitor. tied to SGND, the device operates with a maximum valley current sense threshold of 30mV typical. If V
BG (Pin 12):
Bottom Gate Drive. This pin drives the gate RNG is tied to INTV of the bottom N-Channel power MOSFET between PGND CC, the device operates with a maximum valley current sense threshold of 75mV typical. and INTVCC.
MODE (Pin 4):
MODE Input. Connect this pin to INTV
PGND (Pin 13):
Power Ground. Connect this pin as close CC to enable discontinuous mode for light load operation. Con- as practical to the source of the bottom N-channel power nect this pin to SGND to force continuous mode operation MOSFET, the (–) terminal of CINTVCC and the (–) terminal in all conditions. of CVIN.
I SW (Pin 14):
Switch Node. The (–) terminal of the bootstrap
TH (Pin 5):
Current Control Threshold and Error Amplifi er Compensation Point. The current comparator threshold capacitor, CB, connects to this node. This pin swings from increases with this control voltage. The voltage ranges a diode voltage below ground up to VIN. from 0V to 2.4V, with 0.8V corresponding to zero sense
TG (Pin 15):
Top Gate Drive. This pin drives the gate of the voltage (zero current). top N-channel power MOSFET between SW and BOOST.
SGND (Pin 6):
Signal Ground. All small-signal components
BOOST (Pin 16):
Boosted Floating Driver Supply. The (+) should be connected to SGND. Connect SGND to PGND terminal of the bootstrap capacitor, CB, connects to this using a single PCB trace. node. This node swings from (INTVCC – VSCHOTTKY) to
I
V
ON (Pin 7):
On-Time Current Input. Tie a resistor from IN + (INTVCC – VSCHOTTKY). VIN to this pin to set the one-shot timer current and thus
Exposed Pad (Pin 17):
The Exposed Pad is SGND and the switching frequency. must be soldered to the PCB.
VFB (Pin 8):
Error Amplifi er Feedback Input. This pin con- nects the error amplifi er to an external resistive divider from VOUT. 3879f 8
PIN FUNCTIONS TRACK/SS (Pin 1):
External Tracking and Soft-Start Input.
RUN (Pin 9):
Run Control Input. RUN below 1.5V disables The LTC3879 regulates VFB to the smaller of 0.6V or the switching by forcing TG and BG low. RUN less than 1.5V voltage on the TRACK/SS pin. An internal 1μA pull-up but greater than 0.7V enables all internal bias including current source is connected to this pin. A capacitor to the INTVCC output. RUN below 0.7V shuts down all bias ground at this pin sets the ramp time to the fi nal regulated and places the LTC3879 into micropower shutdown mode output voltage. Alternatively, a resistor divider on another of approximately 18μA. There is an internal 1.2μA pull-up voltage supply connected to this pin allows the output to current source for operation with an open-collector RUN track the other supply during start-up. signal.
PGOOD (Pin 2):
Power Good Output. This open-drain
VIN (Pin 10):
Main Input Supply. The supply voltage can logic output is pulled to ground when the output voltage is range from 4V to 38V. For increased noise immunity de- outside of a ±10% window around the regulation point. couple this pin to PGND with an RC fi lter.
VRNG (Pin 3):
VDS Sense Voltage Range Input. The maxi-
INTVCC (Pin 11):
Internal 5.3V Regulator Output. The mum allowed bottom MOSFET VDS sense voltage between driver and control circuits are powered from this voltage. SW and PGND is equal to (0.133)VRNG. The voltage applied Decouple this pin to PGND with a minimum of 1μF, 10V to VRNG can be any value between 0.2V and 2V. If VRNG is X5R or X7R ceramic capacitor. tied to SGND, the device operates with a maximum valley current sense threshold of 30mV typical. If V
BG (Pin 12):
Bottom Gate Drive. This pin drives the gate RNG is tied to INTV of the bottom N-Channel power MOSFET between PGND CC, the device operates with a maximum valley current sense threshold of 75mV typical. and INTVCC.
MODE (Pin 4):
MODE Input. Connect this pin to INTV
PGND (Pin 13):
Power Ground. Connect this pin as close CC to enable discontinuous mode for light load operation. Con- as practical to the source of the bottom N-channel power nect this pin to SGND to force continuous mode operation MOSFET, the (–) terminal of CINTVCC and the (–) terminal in all conditions. of CVIN.
I SW (Pin 14):
Switch Node. The (–) terminal of the bootstrap
TH (Pin 5):
Current Control Threshold and Error Amplifi er Compensation Point. The current comparator threshold capacitor, CB, connects to this node. This pin swings from increases with this control voltage. The voltage ranges a diode voltage below ground up to VIN. from 0V to 2.4V, with 0.8V corresponding to zero sense
TG (Pin 15):
Top Gate Drive. This pin drives the gate of the voltage (zero current). top N-channel power MOSFET between SW and BOOST.
SGND (Pin 6):
Signal Ground. All small-signal components
BOOST (Pin 16):
Boosted Floating Driver Supply. The (+) should be connected to SGND. Connect SGND to PGND terminal of the bootstrap capacitor, CB, connects to this using a single PCB trace. node. This node swings from (INTVCC – VSCHOTTKY) to
I
V
ON (Pin 7):
On-Time Current Input. Tie a resistor from IN + (INTVCC – VSCHOTTKY). VIN to this pin to set the one-shot timer current and thus
Exposed Pad (Pin 17):
The Exposed Pad is SGND and the switching frequency. must be soldered to the PCB.
VFB (Pin 8):
Error Amplifi er Feedback Input. This pin con- nects the error amplifi er to an external resistive divider from VOUT. 3879f 8
