Datasheet LT1776 (Analog Devices) - 10

LT1776
U U W U APPLICATIONS INFORMATION Input Voltage vs Operating Frequency Considerations
resulting ramping current behavior helps overdrive the The absolute maximum input supply voltage for the LT1776 current comparator (current mode switching) and reduce is specified at 60V. This is based solely on internal semi- its propagation delay, hastening output switch turnoff. conductor junction breakdown effects. Due to internal Second, and more importantly, actual power supply op- power dissipation, the actual maximum V eration involves a feedback amplifier that adjusts the VC IN achievable in a particular application may be less than this. node control voltage to maintain proper output voltage. As progressively shorter ON times are required, the feedback A detailed theoretical basis for estimating internal power loop acts to reduce VC, and the resulting overdrive further loss is given in the section, Thermal Considerations. Note reduces the propagation delay in the current comparator. that AC switching loss is proportional to both operating A suggested worst-case limit for minimum switch ON time frequency and output current. The majority of AC switch- in actual operation is 350ns. ing loss is also proportional to the
square
of input voltage. For example, while the combination of V A potential controllability problem arises if the LT1776 is IN = 40V, VOUT = 5V at 500mA and f called upon to produce an ON time shorter than its ability. OSC = 200kHz may be easily achievable, simultaneously raising V Feedback loop action will lower then reduce the VC control IN to 60V and fOSC to 400kHz is not possible. Nevertheless, input voltage transients up to voltage to the point where some sort of cycle-skipping or 60V can usually be accommodated, assuming the result- odd/even cycle behavior is exhibited. ing increase in internal dissipation is of insufficient time In summary: duration to raise die temperature significantly. 1. Be aware that the simultaneous requirements of high A second consideration is controllability. A potential limi- VIN, high IOUT and high fOSC may not be achievable in tation occurs with a high step-down ratio of VIN to VOUT, practice due to internal dissipation. The Thermal Con- as this requires a correspondingly narrow minimum switch siderations section offers a basis to estimate internal ON time. An approximate expression for this (assuming power. In questionable cases a prototype supply should continuous mode operation) is given as follows: be built and exercised to verify acceptable operation. V V 2. The simultaneous requirements of high VIN, low VOUT M OUT F in t = + ON and high fOSC can result in an unacceptably short V f ( ) IN OSC minimum switch ON time. Cycle skipping and/or odd/ even cycle behavior will result although correct output where: voltage is usually maintained. VIN = input voltage VOUT = output voltage
Minimum Load Considerations
VF = Schottky diode forward drop f As discussed previously, a lightly loaded LT1776 with VC OSC = switching frequency pin control voltage below the boost threshold will operate It is important to understand the nature of minimum in low dV/dt mode. This affords greater controllability at switch ON time as given in the data sheet. This test is light loads, as minimum tON requirements are relaxed. intended to mimic behavior under short-circuit condi- tions. It is performed with the V However, some users may be indifferent to pulse skipping C control voltage at its clamp level (V behavior, but instead may be concerned with maintaining CL) and uses a fixed resistive load from VSW to ground for simplicity. The resulting ON time behavior is maximum possible efficiency at light loads. This require- overconservative as a general operating design value for ment can be satisfied by forcing the part into Burst ModeTM two reasons. First, actual power supply application cir- operation. The use of an external comparator whose cuits present an inductive load to the VSW node. The Burst Mode is a trademark of Linear Technology Corporation. 10