Datasheet LT5514 (Analog Devices) - 4

ManufacturerAnalog Devices
DescriptionUltralow Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain
Pages / Page20 / 4 — AC ELECTRICAL CHARACTERISTICS (Standard Mode). VCC = 5V, VCCO = 5V, ENA = …
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AC ELECTRICAL CHARACTERISTICS (Standard Mode). VCC = 5V, VCCO = 5V, ENA = ENB = 3V, TA = 25. C, ROUT = 200

AC ELECTRICAL CHARACTERISTICS (Standard Mode) VCC = 5V, VCCO = 5V, ENA = ENB = 3V, TA = 25 C, ROUT = 200

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LT5514
AC ELECTRICAL CHARACTERISTICS (Standard Mode) VCC = 5V, VCCO = 5V, ENA = ENB = 3V, TA = 25
°
C, ROUT = 200

. Maximum gain specifications are with respect to differential inputs and differential outputs, unless otherwise noted. (Note 7) (Test circuits shown in Figures 9 and 10) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Dynamic Performance
BW Large-Signal –3dB Bandwidth All Gain Settings (Note 8) ROUT = 100Ω LF to 850 MHz ROUT = 200Ω; L1, L2 = 33nH (Figure 9) LF to 500 MHz POUT(MAX) Clipping Limited Maximum Sinusoidal All Gain Settings, Single Tone, ROUT = 150Ω 21 dBm Output Power fIN = 100MHz (Note 10) gm Amplifier Transconductance Max Gain, fIN = 100MHz 0.30 S PGA1 = Low, fIN = 100MHz 0.21 S S12 Reverse Isolation fIN = 100MHz (Note 9) –92 dB fIN = 400MHz (Note 9) –78 dB tr, tf Step Response Rise and Fall Time All Gain Settings, 10% to 90%, ROUT = 100Ω 500 ps Group Delay All Gain Settings, ROUT = 100Ω 800 ps Group Delay Variation 30MHz to 300MHz Frequency Range, ±50 ps ROUT = 100Ω PGA Settling Time 500 ns Enable/Disable Time 600 ns
Distortion and Noise
OIP3 Output Third Order Intercept Point for POUT = 9dBm (Each Tone), 200kHz Tone Spacing PGA0 = High (PGA1, PGA2, PGA3 Any State) fIN = 100MHz +47.0 dBm fIN = 200MHz +40.5 dBm Output Third Order Intercept Point for POUT = 9dBm (Each Tone), 200kHz Tone Spacing PGA0 = Low (PGA1, PGA2, PGA3 Any State) fIN = 100MHz +42.0 dBm fIN = 200MHz +37.5 dBm HD2 Second Harmonic Distortion POUT = 11dBm (Single Tone), fIN = 50MHz –82 dBc HD3 Third Harmonic Distortion POUT = 11dBm (Single Tone), fIN = 50MHz –72 dBc NFLOOR Output Noise Floor PGA1 = High, fIN = 100MHz –134 dBm/Hz (PGAO, PGA2, PGA3 Any State) PGA1 = Low, fIN = 100MHz –136 dBm/Hz NF Noise Figure Max Gain, fIN = 100MHz 7.4 dB –3dB Step, fIN = 100MHz 7.7 dB
Amplifier Power Gain and Gain Step
GMAX Maximum Gain fIN = 20MHz and 200MHz 33 dB GMIN Minimum Gain fIN = 20MHz and 200MHz 10.5 dB GSTEP Gain Step Size fIN = 20MHz and 200MHz 1.05 1.5 1.95 dB Gain Step Accuracy fIN = 20MHz and 200MHz ±0.1 dB
Amplifier I/O Impedance (Parallel Values Specified Differentially)
RIN Input Resistance fIN = 100MHz 108 Ω CIN Input Capacitance fIN = 100MHz 2.8 pF RO Output Resistance fIN = 100MHz 3.4 kΩ CO Output Capacitance fIN = 100MHz 1.9 pF 5514f 4
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