Datasheet ADP2384 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | 20 V, 4 A, Synchronous Step-Down DC-to-DC Regulator |
| Pages / Page | 24 / 5 — Data Sheet. ADP2384. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table … |
| Revision | A |
| File Format / Size | PDF / 708 Kb |
| Document Language | English |
Data Sheet. ADP2384. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table 2. Parameter. Rating. Table 3. Thermal Resistance
Model Line for this Datasheet
Text Version of Document
Data Sheet ADP2384 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Rating
θJA is specified for the worst-case conditions, that is, a device PVIN, SW, EN, PGOOD −0.3 V to +22 V soldered in a 4-layer, JEDEC standard circuit board for surface- SW 10 ns Transient −2.5 V to +22 V mount packages. SW 100 ns Transient −1 V to +22 V
Table 3. Thermal Resistance
BST VSW + 6 V
Package Type
θ FB, SS, COMP, SYNC, RT
JA
θ
JC Unit
−0.3 V to +6 V 24-Lead LFCSP_WQ 42.6 6.8 (EP, SW) °C/W VREG −0.3 V to +12 V 2.3 (EP, GND) PGND to GND −0.3 V to +0.3 V Operating Junction Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C
ESD CAUTION
Soldering Conditions JEDEC J-STD-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 5 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL BLOCK DIAGRAM THEORY OF OPERATION CONTROL SCHEME PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SYNCHRONIZATION SOFT START POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING VOLTAGE CONVERSION LIMITATIONS INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING THE INPUT VOLTAGE UVLO COMPENSATION DESIGN ADIsimPower DESIGN TOOL DESIGN EXAMPLE OUTPUT VOLTAGE SETTING (DESIGN EXAMPLE) FREQUENCY SETTING INDUCTOR SELECTION (DESIGN EXAMPLE) OUTPUT CAPACITOR SELECTION (DESIGN EXAMPLE) COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION (DESIGN EXAMPLE) RECOMMENDED EXTERNAL COMPONENTS CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
θJA is specified for the worst-case conditions, that is, a device PVIN, SW, EN, PGOOD −0.3 V to +22 V soldered in a 4-layer, JEDEC standard circuit board for surface- SW 10 ns Transient −2.5 V to +22 V mount packages. SW 100 ns Transient −1 V to +22 V
Table 3. Thermal Resistance
BST VSW + 6 V
Package Type
θ FB, SS, COMP, SYNC, RT
JA
θ
JC Unit
−0.3 V to +6 V 24-Lead LFCSP_WQ 42.6 6.8 (EP, SW) °C/W VREG −0.3 V to +12 V 2.3 (EP, GND) PGND to GND −0.3 V to +0.3 V Operating Junction Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C
ESD CAUTION
Soldering Conditions JEDEC J-STD-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 5 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL BLOCK DIAGRAM THEORY OF OPERATION CONTROL SCHEME PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SYNCHRONIZATION SOFT START POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING VOLTAGE CONVERSION LIMITATIONS INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING THE INPUT VOLTAGE UVLO COMPENSATION DESIGN ADIsimPower DESIGN TOOL DESIGN EXAMPLE OUTPUT VOLTAGE SETTING (DESIGN EXAMPLE) FREQUENCY SETTING INDUCTOR SELECTION (DESIGN EXAMPLE) OUTPUT CAPACITOR SELECTION (DESIGN EXAMPLE) COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION (DESIGN EXAMPLE) RECOMMENDED EXTERNAL COMPONENTS CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
