Datasheet ADP2108 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Compact, 600 mA, 3 MHz, Step-Down DC-to-DC Converter |
| Pages / Page | 20 / 5 — Data Sheet. ADP2108. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. BALL A1 … |
| Revision | H |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
Data Sheet. ADP2108. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. BALL A1 INDICATOR. VIN. GND. TOP VIEW. (BALL SIDE DOWN). Not to Scale
Model Line for this Datasheet
Text Version of Document
Data Sheet ADP2108 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR 1 2 VIN GND A SW B EN FB C TOP VIEW
2
(BALL SIDE DOWN)
00 5-
Not to Scale
37 07 Figure 2. WLCSP Pin Configuration
Table 4. WLCSP Pin Function Descriptions Pin No. Mnemonic Description
A1 VIN Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μF or greater capacitor as close to the ADP2108 as possible. A2 GND Ground. Connect all the input and output capacitors to GND. B SW Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier. C1 EN Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.2 μA. C2 FB Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator.
VIN 1 5 SW ADP2108 GND 2 TOP VIEW (Not to Scale)
40
EN
0
3 4 FB
75- 073 Figure 3. TSOT Pin Configuration
Table 5. TSOT Pin Function Descriptions Pin No. Mnemonic Description
1 VIN Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μf or greater capacitor as close to the ADP2108 as possible. 2 GND Ground. Connect all the input and output capacitors to GND. 3 EN Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.1 μA. 4 FB Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator. 5 SW Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier. Rev. H | Page 5 of 20 Document Outline Features Applications General Description Typical Applications Circuit Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme PWM Mode Power Save Mode Power Save Mode Current Threshold Enable/Shutdown Short-Circuit Protection Undervoltage Lockout Thermal Protection Soft Start Current Limit 100% Duty Operation Applications Information ADIsimPower Design Tool External Component Selection Inductor Output Capacitor Input Capacitor Thermal Considerations PCB Layout Guidelines Evaluation Board Outline Dimensions Ordering Guide
2
(BALL SIDE DOWN)
00 5-
Not to Scale
37 07 Figure 2. WLCSP Pin Configuration
Table 4. WLCSP Pin Function Descriptions Pin No. Mnemonic Description
A1 VIN Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μF or greater capacitor as close to the ADP2108 as possible. A2 GND Ground. Connect all the input and output capacitors to GND. B SW Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier. C1 EN Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.2 μA. C2 FB Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator.
VIN 1 5 SW ADP2108 GND 2 TOP VIEW (Not to Scale)
40
EN
0
3 4 FB
75- 073 Figure 3. TSOT Pin Configuration
Table 5. TSOT Pin Function Descriptions Pin No. Mnemonic Description
1 VIN Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μf or greater capacitor as close to the ADP2108 as possible. 2 GND Ground. Connect all the input and output capacitors to GND. 3 EN Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.1 μA. 4 FB Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator. 5 SW Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier. Rev. H | Page 5 of 20 Document Outline Features Applications General Description Typical Applications Circuit Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme PWM Mode Power Save Mode Power Save Mode Current Threshold Enable/Shutdown Short-Circuit Protection Undervoltage Lockout Thermal Protection Soft Start Current Limit 100% Duty Operation Applications Information ADIsimPower Design Tool External Component Selection Inductor Output Capacitor Input Capacitor Thermal Considerations PCB Layout Guidelines Evaluation Board Outline Dimensions Ordering Guide
