Datasheet LTC3406-1.2 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 1.5MHz, 600mA Synchronous Step-Down Regulator in ThinSOT |
| Pages / Page | 12 / 6 — OPERATIO (Refer to Functional Diagram). Burst Mode Operation. Figure 1. … |
| File Format / Size | PDF / 238 Kb |
| Document Language | English |
OPERATIO (Refer to Functional Diagram). Burst Mode Operation. Figure 1. Typical Application. Main Control Loop
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LTC3406-1.2
U OPERATIO (Refer to Functional Diagram)
V 2.2µH* IN VOUT turning the main switch off and keeping it off until the fault 4 3 2.7V VIN SW 1.2V C is removed. TO 5.5V CIN** OUT† 600mA 4.7µF 10µF LTC3406-1.2 CER CER 1 5
Burst Mode Operation
RUN 340612 F01 VOUT GND The LTC3406-1.2 is capable of Burst Mode operation in 2 which the internal power MOSFETs operate intermittently based on load demand. *MURATA LQH3C2R2M24 **TAIYO YUDEN JMK212BJ475MG †TAIYO YUDEN JMK316BJ106ML In Burst Mode operation, the peak current of the inductor
Figure 1. Typical Application
is set to approximately 200mA regardless of the output load. Each burst event can last from a few cycles at light
Main Control Loop
loads to almost continuously cycling with short sleep The LTC3406-1.2 uses a constant frequency, current intervals at moderate loads. In between these burst events, mode step-down architecture. Both the main (P-channel the power MOSFETs and any unneeded circuitry are turned MOSFET) and synchronous (N-channel MOSFET) switches off, reducing the quiescent current to 20µA. In this sleep are internal. During normal operation, the internal top state, the load current is being supplied solely from the power MOSFET is turned on each cycle when the oscillator output capacitor. As the output voltage droops, the EA sets the RS latch, and turned off when the current com- amplifier’s output rises above the sleep threshold signal- parator, ICOMP, resets the RS latch. The peak inductor ing the BURST comparator to trip and turn the top MOSFET current at which ICOMP resets the RS latch, is controlled by on. This process repeats at a rate that is dependent on the the output of error amplifier EA. When the load current load demand. increases, it causes a slight decrease in the feedback voltage, FB, relative to the 0.8V reference, which in turn
Short-Circuit Protection
causes the EA amplifier’s output voltage to increase until When the output is shorted to ground, the frequency of the the average inductor current matches the new load cur- oscillator is reduced to about 210kHz, 1/7 the nominal rent. While the top MOSFET is off, the bottom MOSFET is frequency. This frequency foldback ensures that the in- turned on until either the inductor current starts to reverse, ductor current has more time to decay, thereby preventing as indicated by the current reversal comparator IRCMP, or runaway. The oscillator’s frequency will progressively the beginning of the next clock cycle. The comparator increase to 1.5MHz when VOUT rises above 0V. OVDET guards against transient overshoots >6.25% by 340612fa 6
U OPERATIO (Refer to Functional Diagram)
V 2.2µH* IN VOUT turning the main switch off and keeping it off until the fault 4 3 2.7V VIN SW 1.2V C is removed. TO 5.5V CIN** OUT† 600mA 4.7µF 10µF LTC3406-1.2 CER CER 1 5
Burst Mode Operation
RUN 340612 F01 VOUT GND The LTC3406-1.2 is capable of Burst Mode operation in 2 which the internal power MOSFETs operate intermittently based on load demand. *MURATA LQH3C2R2M24 **TAIYO YUDEN JMK212BJ475MG †TAIYO YUDEN JMK316BJ106ML In Burst Mode operation, the peak current of the inductor
Figure 1. Typical Application
is set to approximately 200mA regardless of the output load. Each burst event can last from a few cycles at light
Main Control Loop
loads to almost continuously cycling with short sleep The LTC3406-1.2 uses a constant frequency, current intervals at moderate loads. In between these burst events, mode step-down architecture. Both the main (P-channel the power MOSFETs and any unneeded circuitry are turned MOSFET) and synchronous (N-channel MOSFET) switches off, reducing the quiescent current to 20µA. In this sleep are internal. During normal operation, the internal top state, the load current is being supplied solely from the power MOSFET is turned on each cycle when the oscillator output capacitor. As the output voltage droops, the EA sets the RS latch, and turned off when the current com- amplifier’s output rises above the sleep threshold signal- parator, ICOMP, resets the RS latch. The peak inductor ing the BURST comparator to trip and turn the top MOSFET current at which ICOMP resets the RS latch, is controlled by on. This process repeats at a rate that is dependent on the the output of error amplifier EA. When the load current load demand. increases, it causes a slight decrease in the feedback voltage, FB, relative to the 0.8V reference, which in turn
Short-Circuit Protection
causes the EA amplifier’s output voltage to increase until When the output is shorted to ground, the frequency of the the average inductor current matches the new load cur- oscillator is reduced to about 210kHz, 1/7 the nominal rent. While the top MOSFET is off, the bottom MOSFET is frequency. This frequency foldback ensures that the in- turned on until either the inductor current starts to reverse, ductor current has more time to decay, thereby preventing as indicated by the current reversal comparator IRCMP, or runaway. The oscillator’s frequency will progressively the beginning of the next clock cycle. The comparator increase to 1.5MHz when VOUT rises above 0V. OVDET guards against transient overshoots >6.25% by 340612fa 6
