Datasheet LTC1707 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | High Efficiency Monolithic Synchronous Step-Down Switching Regulator |
| Pages / Page | 16 / 5 — PI FU CTIO S ITH (Pin 1):. VIN (Pin 6):. SYNC/MODE (Pin 7):. RUN/SS (Pin … |
| File Format / Size | PDF / 228 Kb |
| Document Language | English |
PI FU CTIO S ITH (Pin 1):. VIN (Pin 6):. SYNC/MODE (Pin 7):. RUN/SS (Pin 2):. FB (Pin 3):. GND (Pin 4):. VREF (Pin 8):. SW (Pin 5):
Model Line for this Datasheet
Text Version of Document
LTC1707
U U U PI FU CTIO S ITH (Pin 1):
Error Amplifier Compensation Point. The
VIN (Pin 6):
Main Supply Pin. Must be closely decoupled current comparator threshold increases with this control to GND, Pin 4. voltage. Nominal voltage range for this pin is 0V to 1.2V.
SYNC/MODE (Pin 7):
This pin performs two functions:
RUN/SS (Pin 2):
Combination of Soft-Start and Run 1) synchronize with an external clock and 2) select be- Control Inputs. A capacitor to ground at this pin sets the tween two modes of low load current operation. To ramp time to full current output. The time is approximately synchronize with an external clock, apply a TTL/CMOS 0.5s/µF. Forcing this pin below 0.4V shuts down the compatible clock with a frequency between 385kHz and LTC1707. 550kHz. To select Burst Mode operation, float the pin or
V
tie it to VIN. Grounding Pin 7 forces pulse skipping mode
FB (Pin 3):
Feedback Pin. Receives the feedback voltage from an external resistive divider across the output. operation.
GND (Pin 4):
Ground Pin.
VREF (Pin 8):
The Output of a 1.19V ±1% Precision Reference. May be loaded up to 100µA and is stable with
SW (Pin 5):
Switch Node Connection to Inductor. This pin up to 2000pF load capacitance. connects to the drains of the internal main and synchro- nous power MOSFET switches.
U U W FU CTIO AL DIAGRA
BURST Y = “0” ONLY WHEN X IS A CONSTANT “1” V DEFEAT IN VIN Y VIN X 1.5µA SYNC/MODE SLOPE 7 COMP OSC 0.4V – 0.6V VFB + 6 V 3 IN – FREQ SHIFT EN + – VIN SLEEP 6Ω VREF 0.8V – + + + 0.12V I 8 EA COMP – BURST 1.19V 2.25µA ITH 1 REF VIN S Q SWITCHING RUN/SOFT RUN/SS 2 R Q LOGIC START UVLO AND ANTI- TRIP = 2.7V BLANKING SHOOT-THRU + CIRCUIT OVDET 0.86V – + 5 SW SHUTDOWN IRCMP – 4 GND 1707 BD 5
U U U PI FU CTIO S ITH (Pin 1):
Error Amplifier Compensation Point. The
VIN (Pin 6):
Main Supply Pin. Must be closely decoupled current comparator threshold increases with this control to GND, Pin 4. voltage. Nominal voltage range for this pin is 0V to 1.2V.
SYNC/MODE (Pin 7):
This pin performs two functions:
RUN/SS (Pin 2):
Combination of Soft-Start and Run 1) synchronize with an external clock and 2) select be- Control Inputs. A capacitor to ground at this pin sets the tween two modes of low load current operation. To ramp time to full current output. The time is approximately synchronize with an external clock, apply a TTL/CMOS 0.5s/µF. Forcing this pin below 0.4V shuts down the compatible clock with a frequency between 385kHz and LTC1707. 550kHz. To select Burst Mode operation, float the pin or
V
tie it to VIN. Grounding Pin 7 forces pulse skipping mode
FB (Pin 3):
Feedback Pin. Receives the feedback voltage from an external resistive divider across the output. operation.
GND (Pin 4):
Ground Pin.
VREF (Pin 8):
The Output of a 1.19V ±1% Precision Reference. May be loaded up to 100µA and is stable with
SW (Pin 5):
Switch Node Connection to Inductor. This pin up to 2000pF load capacitance. connects to the drains of the internal main and synchro- nous power MOSFET switches.
U U W FU CTIO AL DIAGRA
BURST Y = “0” ONLY WHEN X IS A CONSTANT “1” V DEFEAT IN VIN Y VIN X 1.5µA SYNC/MODE SLOPE 7 COMP OSC 0.4V – 0.6V VFB + 6 V 3 IN – FREQ SHIFT EN + – VIN SLEEP 6Ω VREF 0.8V – + + + 0.12V I 8 EA COMP – BURST 1.19V 2.25µA ITH 1 REF VIN S Q SWITCHING RUN/SOFT RUN/SS 2 R Q LOGIC START UVLO AND ANTI- TRIP = 2.7V BLANKING SHOOT-THRU + CIRCUIT OVDET 0.86V – + 5 SW SHUTDOWN IRCMP – 4 GND 1707 BD 5
