Datasheet LTC1627 (Analog Devices) - 5

ManufacturerAnalog Devices
DescriptionMonolithic Synchronous Step-Down Switching Regulator
Pages / Page16 / 5 — PI FU CTIO S ITH (Pin 1):. VIN (Pin 6):. VDR (Pin 7):. RUN/SS (Pin 2):. …
File Format / SizePDF / 240 Kb
Document LanguageEnglish

PI FU CTIO S ITH (Pin 1):. VIN (Pin 6):. VDR (Pin 7):. RUN/SS (Pin 2):. SYNC/FCB (Pin 8):. VFB (Pin 3):. GND (Pin 4):. SW (Pin 5):

PI FU CTIO S ITH (Pin 1): VIN (Pin 6): VDR (Pin 7): RUN/SS (Pin 2): SYNC/FCB (Pin 8): VFB (Pin 3): GND (Pin 4): SW (Pin 5):

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Text Version of Document

LTC1627
U U U PI FU CTIO S ITH (Pin 1):
Error Amplifier Compensation Point. The
VIN (Pin 6):
Main Supply Pin. Must be closely decoupled current comparator threshold increases with this control to GND, Pin 4. voltage. Nominal voltage range for this pin is 0V to 1.2V.
VDR (Pin 7):
Top Driver Return Pin. This pin can be
RUN/SS (Pin 2):
Combination of Soft-Start and Run bootstrapped to go below ground to improve efficiency at Control Inputs. A capacitor to ground at this pin sets the low VIN (see Applications Information). ramp time to full current output. The time is approximately 0.5s/µF. Forcing this pin below 0.4V shuts down all the
SYNC/FCB (Pin 8):
Multifunction Pin. This pin performs circuitry. three functions: 1) secondary winding feedback input, 2) external clock synchronization and 3) Burst Mode opera-
VFB (Pin 3):
Feedback Pin. Receives the feedback voltage tion or forced continuous mode select. For secondary from an external resistive divider across the output. winding applications connect a resistive divider from the
GND (Pin 4):
Ground Pin. secondary output. To synchronize with an external clock apply a TTL/CMOS compatible clock with a frequency
SW (Pin 5):
Switch Node Connection to Inductor. This pin between 385kHz and 525kHz. To select Burst Mode opera- connects to the drains of the internal main and synchro- tion, float the pin or tie it to VIN. Grounding Pin 8 forces nous power MOSFET switches. continuous operation (see Applications Information).
U U W FU CTIO AL DIAGRA
BURST Y = “0” ONLY WHEN X IS A CONSTANT “1” V DEFEAT IN VIN Y VIN X 1.5µA SYNC/FCB SLOPE 8 COMP OSC 0.4V – 0.6V VFB + 6 V 3 IN – FREQ EN SHIFT + – VIN SLEEP 6Ω 0.8V – + + + 0.12V I EA COMP – BURST 0.8V 2.25µA ITH 1 REF VIN S Q SWITCHING RUN/SOFT RUN/SS 2 R Q LOGIC START 7 VDR UVLO AND ANTI- TRIP = 2.5V BLANKING SHOOT-THRU + CIRCUIT OVDET 0.86V – + 5 SW SHUTDOWN IRCMP – – 4 GND 0.8V FCB 1627 BD + 5
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