Datasheet AD5116 (Analog Devices) - 7

ManufacturerAnalog Devices
DescriptionSingle-Channel, 64-Position, Push Button, ±8% Resistor Tolerance, Nonvolatile Digital Potentiometer
Pages / Page16 / 7 — Data Sheet. AD5116. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. 8 ASE. A …
RevisionB
File Format / SizePDF / 377 Kb
Document LanguageEnglish

Data Sheet. AD5116. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. 8 ASE. A 2. 7 PU. TOP VIEW. W 3. (Not to Scale). 6 PD. B 4. 5 GND. NOTES

Data Sheet AD5116 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 8 ASE A 2 7 PU TOP VIEW W 3 (Not to Scale) 6 PD B 4 5 GND NOTES

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Data Sheet AD5116 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS V 1 DD 8 ASE A 2 AD5116 7 PU TOP VIEW W 3 (Not to Scale) 6 PD B 4 5 GND NOTES
-007
1. THE EXPOSED PAD IS INTERNALLY
57
FLOATING.
096 Figure 7. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Description
1 VDD Positive Power Supply. This pin should be decoupled with 0.1μF ceramic capacitors and 10 μF capacitors. 2 A Terminal A of RDAC. GND ≤ VA ≤ VDD. 3 W Wiper terminal of RDAC. GND ≤ VW ≤ VDD. 4 B Terminal B of RDAC. GND ≤ VB ≤ VDD. 5 GND Ground Pin. 6 PD Push-Down Pin. Connect to the external push button. Active high. An internal 100 kΩ pull-down resistor is connected to GND. 7 PU Push-Up Pin. Connect to the external push button. Active high. An internal 100 kΩ pull-down resistor is connected to GND. 8 ASE Automatic Save Enable. Automatic save enable is configured at power-up. Active low. This pin requires a pull resistor connected between VDD or GND. If ASE is enabled, this pin also indicates when the end scale (maximum or minimum resistance) has been reached. EPAD Exposed Pad. The exposed pad is internally floating. Rev. B | Page 7 of 16 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Interface Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Theory of Operation RDAC Register Manual Increment Auto Scan Increment Low Wiper Resistance Feature EEPROM Automatic Save Enable Auto Save Manual Store End Scale Resistance Indicator RDAC Architecture Top Scale/Bottom Scale Architecture Programming the Variable Resistor Rheostat Operation—±8% Resistor Tolerance Programming the Potentiometer Divider Voltage Output Operation Terminal Voltage Operating Range Power-Up Sequence Layout and Power Supply Biasing Outline Dimensions Ordering Guide
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