Datasheet L5965 (STMicroelectronics)
| Manufacturer | STMicroelectronics |
| Description | Multiple power management for automotive vision and radar systems |
| Pages / Page | 85 / 1 — L5965. Features. VFQFPN-48 (7x7 mm). Product status link. Product … |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
L5965. Features. VFQFPN-48 (7x7 mm). Product status link. Product summary. Order code. Package. Packing. Description. DS12567. Rev 2
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L5965
Datasheet Power management for automotive vision and radar systems
Features
• AEC-Q100 qualified • Pre SMPS BUCK1 regulator controller, adjustable via OTP to 0.8 V, 1.0 V, 1.1 V, 1.2 V, 1.8 V, 3.3 V, 3.8 V, 5.0 V @ 0.4 MHz
VFQFPN-48 (7x7 mm)
• Pre SMPS BUCK2 regulator, adjustable via OTP to 1.0 V, 1.1 V, 1.2 V, 1.35 V, 1.5 V, 3.3 V, 3.6 V, 5.0 V @ 1.35/2.6 A min peak current limit, 0.4/2.4 MHz GAPGPS03203 • Post SMPS BUCK3 regulator, adjustable via OTP to 1.0 V, 1.2 V, 1.35 V, 1.8 V, 2.0 V, 2.3 V, 2.5 V, 3.3 V @ 1.4 A min peak current limit, 2.4 MHz • Post SMPS BUCK4 regulator, adjustable via OTP to 1.1 V, 1.12 V, 1.2 V, 1.25 V, 1.3 V, 1.35 V, 1.8 V, 3.3 V @ 1 A min peak current limit, 2.4 MHz • Post SMPS BOOST regulator, adjustable via OTP to 5.0 V @ 0.3 A max load current, 7.0 V @ 0.2 A max load current, 2.4 MHz • Post Linear regulator LDO, adjustable via OTP to 1.2 V, 1.25 V, 1.3 V, 1.8 V, 2.5 V, 2.8 V, 3.3 V, 5.0 V @ 300/600 mA max load current • Precise Voltage reference, adjustable via OTP to 1.8 V, 2.5 V, 3.3 V, 4.1 V @ 20 mA max load current • SPI interface with CRC • Programmable slew rate/soft start • Voltage supervisors • Spread frequency spectrum • Reset and reset activation list • Adjustable window watchdog supervisors • Power up phase programmable via OTP
Product status link
• Short circuit protected outputs and Fault detection pin to Microcontroller L5965 • Low external components number • Thermal shutdown junction temperature 175 °C
Product summary Order code Package Packing Description
L5965SQ-V0Y Tray VFQFPN-48 L5965 is a multiple voltage regulator composed by two battery compatible BUCK pre- Tape and L5965SQ-V0T regulators (one of which is a controller), two BUCK post regulators with internal reel compensation, one BOOST, one LDO and a precise voltage reference regulator. All the regulators, except the BUCK1 pre-regulator, have internal power switches. OTP (One Time Programmable) cells are used for the main device parameters programming (output voltages and currents, switching frequencies) and to configure power up sequence. An SPI interface can be used to enable or disable the single voltage regulators, for diagnostic information and to program internal blocks parameters (monitor and Power Good thresholds, slew rate, etc.). The device offers a set of features to support applications that need to fulfill functional safety requirements as defined by Automotive Safety Integrity Level (ASIL) A-B-C-D.
DS12567
-
Rev 2
-
May 2019
www.st.com For further information contact your local STMicroelectronics sales office. Document Outline 1 Overview 1.1 Simplified block diagram 1.2 Functional block diagram 2 Pins description 3 Electrical specifications 3.1 Absolute maximum ratings & operating voltage 3.2 Thermal data 3.2.1 Thermal resistance 3.2.2 Thermal warning and protection 3.3 Electrical characteristics 3.3.1 Electrical characteristic curves 4 Functional description 4.1 Programming by OTP 4.2 Voltage regulators and features description 4.2.1 VREG 4.2.2 Pre regulator BUCK1 4.2.3 Pre regulator BUCK2 4.2.4 Post regulator BUCK3 4.2.5 Post regulator BUCK4 4.2.6 BOOST 4.2.7 LDO 4.2.8 VREF 4.2.9 ADC 4.2.10 Wake up pin (WKUP) 4.2.11 Synchronizing pin (SYNC in/out) 4.2.12 Reset and Fault 4.2.13 Configurable watchdog and reset 4.2.14 Under-Voltage, Over-Voltage and Power-Good 4.2.15 Temperature control and VBATx voltage through internal ADC 4.2.16 Maximum Duty Cycle and Refresh Mode for Buck 4.2.17 Frequency-Hopping Spread Spectrum 5 SPI format and register mapping 5.1 SPI frame CRC generator 5.2 SPI registers mapping 5.2.1 SPI REG BUCK1 5.2.2 SPI REG BUCK2 5.2.3 SPI REG WD_REC_EN 5.2.4 SPI REG BUCK4 5.2.5 SPI REG BOOST VREF 5.2.6 SPI REG BUCK EN 5.2.7 SPI REG WD 5.2.8 SPI REG BUCK STAT1 5.2.9 SPI REG BUCK STAT2 5.2.10 SPI REG Fault Table PWUP 5.2.11 SPI REG ADC TH1 5.2.12 SPI REG ADC TH2 5.2.13 SPI REG ADC TH3 5.2.14 SPI REG ADC TH4 5.2.15 SPI REG ADC TH5 5.2.16 SPI REG ADC TH6 5.2.17 SPI REG ADC TH7 5.2.18 SPI REG ADC VBAT1 5.2.19 SPI REG ADC VBAT2 5.2.20 SPI REG OT Warning 5.2.21 SPI Fault STAT 5.2.22 SPI Silicon Version 5.2.23 SPI Device Identification 6 Device operating mode 6.1 Shutdown mode 6.2 Standby mode 6.3 INIT mode 6.4 REC mode 6.5 RAMPUP MAIN and SEC_UP 6.6 ACTIVE mode 6.7 OTP program mode 6.8 OTP bit mapping and register configuration 6.9 OTP (SAF) registers 6.9.1 SAF_REG_OP 6.9.2 SAF_REG_CFG 6.9.3 SAF_REG_DI 6.9.4 SAF_REG_D0_Bit_Ts 6.9.5 SAF_REG_STAT 6.10 Power down phase 6.11 Power up programming 7 Functional safety requirements 7.1 Functions and safety mechanism related to safety requirements 7.2 System safety mechanism 8 Application information 8.1 External components calculation 8.1.1 BUCK1 controller 8.1.1.1 RSENSE 8.1.1.2 BUCK1 output inductor 8.1.1.3 BUCK1 output capacitor 8.1.1.4 BUCK1 bootstrap capacitor 8.1.1.5 BUCK1 compensation network 8.1.2 BUCK2 controller 8.1.2.1 BUCK2 output inductor 8.1.2.2 BUCK2 output capacitor 8.1.2.3 BUCK2 compensation network 8.1.3 BUCK3, BUCK4 8.1.3.1 Output inductor and capacitor 8.1.3.2 Bootstrap capacitor for BUCK3 and BUCK4 8.1.3.3 Input capacitor 8.1.4 BOOST 8.1.4.1 BOOST output inductor 8.1.4.2 BOOST output capacitor 8.1.4.3 BOOST compensation network 8.1.4.4 Output diode for the BOOST converter 8.1.4.5 Input capacitor selection 8.2 PCB Layout example (BUCK1 as main regulator) 9 Package information 9.1 VFQFPN-48 (7x7x1.0 mm - opt. D) package information 9.2 VFQFPN-48 (7x7x1.0) marking information Revision history
Datasheet Power management for automotive vision and radar systems
Features
• AEC-Q100 qualified • Pre SMPS BUCK1 regulator controller, adjustable via OTP to 0.8 V, 1.0 V, 1.1 V, 1.2 V, 1.8 V, 3.3 V, 3.8 V, 5.0 V @ 0.4 MHz
VFQFPN-48 (7x7 mm)
• Pre SMPS BUCK2 regulator, adjustable via OTP to 1.0 V, 1.1 V, 1.2 V, 1.35 V, 1.5 V, 3.3 V, 3.6 V, 5.0 V @ 1.35/2.6 A min peak current limit, 0.4/2.4 MHz GAPGPS03203 • Post SMPS BUCK3 regulator, adjustable via OTP to 1.0 V, 1.2 V, 1.35 V, 1.8 V, 2.0 V, 2.3 V, 2.5 V, 3.3 V @ 1.4 A min peak current limit, 2.4 MHz • Post SMPS BUCK4 regulator, adjustable via OTP to 1.1 V, 1.12 V, 1.2 V, 1.25 V, 1.3 V, 1.35 V, 1.8 V, 3.3 V @ 1 A min peak current limit, 2.4 MHz • Post SMPS BOOST regulator, adjustable via OTP to 5.0 V @ 0.3 A max load current, 7.0 V @ 0.2 A max load current, 2.4 MHz • Post Linear regulator LDO, adjustable via OTP to 1.2 V, 1.25 V, 1.3 V, 1.8 V, 2.5 V, 2.8 V, 3.3 V, 5.0 V @ 300/600 mA max load current • Precise Voltage reference, adjustable via OTP to 1.8 V, 2.5 V, 3.3 V, 4.1 V @ 20 mA max load current • SPI interface with CRC • Programmable slew rate/soft start • Voltage supervisors • Spread frequency spectrum • Reset and reset activation list • Adjustable window watchdog supervisors • Power up phase programmable via OTP
Product status link
• Short circuit protected outputs and Fault detection pin to Microcontroller L5965 • Low external components number • Thermal shutdown junction temperature 175 °C
Product summary Order code Package Packing Description
L5965SQ-V0Y Tray VFQFPN-48 L5965 is a multiple voltage regulator composed by two battery compatible BUCK pre- Tape and L5965SQ-V0T regulators (one of which is a controller), two BUCK post regulators with internal reel compensation, one BOOST, one LDO and a precise voltage reference regulator. All the regulators, except the BUCK1 pre-regulator, have internal power switches. OTP (One Time Programmable) cells are used for the main device parameters programming (output voltages and currents, switching frequencies) and to configure power up sequence. An SPI interface can be used to enable or disable the single voltage regulators, for diagnostic information and to program internal blocks parameters (monitor and Power Good thresholds, slew rate, etc.). The device offers a set of features to support applications that need to fulfill functional safety requirements as defined by Automotive Safety Integrity Level (ASIL) A-B-C-D.
DS12567
-
Rev 2
-
May 2019
www.st.com For further information contact your local STMicroelectronics sales office. Document Outline 1 Overview 1.1 Simplified block diagram 1.2 Functional block diagram 2 Pins description 3 Electrical specifications 3.1 Absolute maximum ratings & operating voltage 3.2 Thermal data 3.2.1 Thermal resistance 3.2.2 Thermal warning and protection 3.3 Electrical characteristics 3.3.1 Electrical characteristic curves 4 Functional description 4.1 Programming by OTP 4.2 Voltage regulators and features description 4.2.1 VREG 4.2.2 Pre regulator BUCK1 4.2.3 Pre regulator BUCK2 4.2.4 Post regulator BUCK3 4.2.5 Post regulator BUCK4 4.2.6 BOOST 4.2.7 LDO 4.2.8 VREF 4.2.9 ADC 4.2.10 Wake up pin (WKUP) 4.2.11 Synchronizing pin (SYNC in/out) 4.2.12 Reset and Fault 4.2.13 Configurable watchdog and reset 4.2.14 Under-Voltage, Over-Voltage and Power-Good 4.2.15 Temperature control and VBATx voltage through internal ADC 4.2.16 Maximum Duty Cycle and Refresh Mode for Buck 4.2.17 Frequency-Hopping Spread Spectrum 5 SPI format and register mapping 5.1 SPI frame CRC generator 5.2 SPI registers mapping 5.2.1 SPI REG BUCK1 5.2.2 SPI REG BUCK2 5.2.3 SPI REG WD_REC_EN 5.2.4 SPI REG BUCK4 5.2.5 SPI REG BOOST VREF 5.2.6 SPI REG BUCK EN 5.2.7 SPI REG WD 5.2.8 SPI REG BUCK STAT1 5.2.9 SPI REG BUCK STAT2 5.2.10 SPI REG Fault Table PWUP 5.2.11 SPI REG ADC TH1 5.2.12 SPI REG ADC TH2 5.2.13 SPI REG ADC TH3 5.2.14 SPI REG ADC TH4 5.2.15 SPI REG ADC TH5 5.2.16 SPI REG ADC TH6 5.2.17 SPI REG ADC TH7 5.2.18 SPI REG ADC VBAT1 5.2.19 SPI REG ADC VBAT2 5.2.20 SPI REG OT Warning 5.2.21 SPI Fault STAT 5.2.22 SPI Silicon Version 5.2.23 SPI Device Identification 6 Device operating mode 6.1 Shutdown mode 6.2 Standby mode 6.3 INIT mode 6.4 REC mode 6.5 RAMPUP MAIN and SEC_UP 6.6 ACTIVE mode 6.7 OTP program mode 6.8 OTP bit mapping and register configuration 6.9 OTP (SAF) registers 6.9.1 SAF_REG_OP 6.9.2 SAF_REG_CFG 6.9.3 SAF_REG_DI 6.9.4 SAF_REG_D0_Bit_Ts 6.9.5 SAF_REG_STAT 6.10 Power down phase 6.11 Power up programming 7 Functional safety requirements 7.1 Functions and safety mechanism related to safety requirements 7.2 System safety mechanism 8 Application information 8.1 External components calculation 8.1.1 BUCK1 controller 8.1.1.1 RSENSE 8.1.1.2 BUCK1 output inductor 8.1.1.3 BUCK1 output capacitor 8.1.1.4 BUCK1 bootstrap capacitor 8.1.1.5 BUCK1 compensation network 8.1.2 BUCK2 controller 8.1.2.1 BUCK2 output inductor 8.1.2.2 BUCK2 output capacitor 8.1.2.3 BUCK2 compensation network 8.1.3 BUCK3, BUCK4 8.1.3.1 Output inductor and capacitor 8.1.3.2 Bootstrap capacitor for BUCK3 and BUCK4 8.1.3.3 Input capacitor 8.1.4 BOOST 8.1.4.1 BOOST output inductor 8.1.4.2 BOOST output capacitor 8.1.4.3 BOOST compensation network 8.1.4.4 Output diode for the BOOST converter 8.1.4.5 Input capacitor selection 8.2 PCB Layout example (BUCK1 as main regulator) 9 Package information 9.1 VFQFPN-48 (7x7x1.0 mm - opt. D) package information 9.2 VFQFPN-48 (7x7x1.0) marking information Revision history
