Datasheet ADuM4122 (Analog Devices)

ManufacturerAnalog Devices
DescriptionSingle Gate, Adjustable Slew Rate, Isolated Gate Driver, 3 A Short-Circuit (
Pages / Page18 / 1 — Single Gate, Adjustable Slew Rate, Isolated. Gate Driver, 3 A …
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Single Gate, Adjustable Slew Rate, Isolated. Gate Driver, 3 A Short-Circuit (<3 Ω). Data Sheet. ADuM4122. FEATURES

Datasheet ADuM4122 Analog Devices

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Single Gate, Adjustable Slew Rate, Isolated Gate Driver, 3 A Short-Circuit (<3 Ω) Data Sheet ADuM4122 FEATURES GENERAL DESCRIPTION 2 A output current per output pin (<3 Ω RDSON_X)
The ADuM4122 is an isolated, single device, dual output driver
3 A peak short-circuit current
that uses iCoupler® technology to provide precision isolation.
3.3 V to 6.5 V, VDD1
The ADuM4122 provides 5 kV rms isolation in the wide-body,
4.5 V to 35 V, VDD2
8-lead SOIC package. These isolation components combine
Positive going threshold, UVLO at 3.3 V VDD1
high speed complementary metal-oxide semiconductor (CMOS)
Multiple positive going thresholds, UVLO options on VDD2
and monolithic transformer technology to provide performance
Grade A: 4.4 V (typical) positive going threshold, UVLO
characteristics superior to alternatives (such as a combination of
Grade B: 7.3 V (typical) positive going threshold, UVLO
pulse transformers and gate drivers).
Grade C: 11.3 V (typical) positive going threshold, UVLO
The ADuM4122 operates with an input supply voltage range
Precise timing characteristics
from 3.3 V to 6.5 V, providing compatibility with lower voltage
48 ns maximum propagation delay for falling edge
systems. Unlike gate drivers that employ high voltage level
CMOS input logic levels
translation methodologies, the ADuM4122 offers true galvanic
High common-mode transient immunity: >150 kV/µs
isolation between the input and the output regions.
High junction temperature operation: 125°C Default low output
The ADuM4122 includes two output pins that facilitate slew
Selectable slew rate control
rate control of two output drive strengths. The VOUT pin follows
Safety and regulatory approvals ( pending)
the logic of the VIN+ pin, while the boosting output, VOUT_SRC,
UL recognition per UL 1577
can be toggled to fol ow the VIN+ pin or to go high-Z. The
5 kV rms for 1 minute
toggling of the slew rate is controlled by the primary side. Slew
CSA Component Acceptance Notice 5A
rate control can al ow for electromagnetic interference (EMI)
VDE certificate of conformity (pending)
mitigation and voltage overshoot control.
DIN V VDE V 0884-10
An internal thermal shutdown sets outputs low if internal
VIORM = 849 V peak
temperatures on the ADuM4122 exceed the thermal shutdown
Wide-body, 8-lead SOIC_IC
As a result, the ADuM4122 provides reliable control over the
Switching power supplies
switching characteristics of insulated gate bipolar transistor (IGBT)
Isolated IGBT and MOSFET gate drivers
and metal-oxide semiconductor field effect transistor (MOSFET)
Industrial inverters
configurations over a wide range of switching voltages, allowing for simple slew rate control.
001 17024- Figure 1. 1 Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,239. Other patents pending.
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Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Electrical Specifications Regulatory Information Package Specifications Insulation and Safety Specifications DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics Recommended Operating Conditions Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Truth Table Typical Performance Characteristics Theory of Operation Applications Information PCB Layout Slew Rate Control Propagation Delay-Related Parameters Peak Current Rating Undervoltage Lockout Output Load Characteristics Power Dissipation Insulation Lifetime Typical Applications Outline Dimensions Ordering Guide