Datasheet IRF9510S, SiHF9510S (Vishay) - 5
| Manufacturer | Vishay |
| Description | Power MOSFET |
| Pages / Page | 9 / 5 — IRF9510S, SiHF9510S. Fig. 10a - Switching Time Test Circuit. Fig. 9 - … |
| File Format / Size | PDF / 179 Kb |
| Document Language | English |
IRF9510S, SiHF9510S. Fig. 10a - Switching Time Test Circuit. Fig. 9 - Maximum Drain Current vs. Case Temperature
Model Line for this Datasheet
Text Version of Document
IRF9510S, SiHF9510S
Vishay Siliconix RD VDS VGS 4.0 D.U.T. Rg -+VDD 3.0 - 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 2.0
Fig. 10a - Switching Time Test Circuit
ain Current (A) , Dr D - I 1.0 t t t t d(on) r d(off) f VGS 0.0 10 % 25 50 75 100 125 150 175 91073_09 TC, Case Temperature (°C) 90 % VDS
Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms
10 ) thJC D = 0.5 1 0.2 0.1 PDM 0.05 0.02 Single Pulse 0.1 t 0.01 1 mal Response (Z (Thermal Response) t2 Ther Notes: 1. Duty Factor, D = t /t 1 2 2. Peak T = P x Z + T j DM thJC C 10-2 10-5 10-4 10-3 10-2 0.1 1 10 91073_11 t1, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L IAS VDS Vary tp to obtain required IAS VDS R D.U.T. g -+ VDD V I DD AS t - 10 V p t 0.01 p Ω VDS
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91073 www.vishay.com S11-1050-Rev. C, 30-May-11 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Vishay Siliconix RD VDS VGS 4.0 D.U.T. Rg -+VDD 3.0 - 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 2.0
Fig. 10a - Switching Time Test Circuit
ain Current (A) , Dr D - I 1.0 t t t t d(on) r d(off) f VGS 0.0 10 % 25 50 75 100 125 150 175 91073_09 TC, Case Temperature (°C) 90 % VDS
Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms
10 ) thJC D = 0.5 1 0.2 0.1 PDM 0.05 0.02 Single Pulse 0.1 t 0.01 1 mal Response (Z (Thermal Response) t2 Ther Notes: 1. Duty Factor, D = t /t 1 2 2. Peak T = P x Z + T j DM thJC C 10-2 10-5 10-4 10-3 10-2 0.1 1 10 91073_11 t1, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L IAS VDS Vary tp to obtain required IAS VDS R D.U.T. g -+ VDD V I DD AS t - 10 V p t 0.01 p Ω VDS
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91073 www.vishay.com S11-1050-Rev. C, 30-May-11 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
